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2019-02

P.1

A 3-Gb/s Equalizer with an Adaptive Swing Controller for TFT-LCD Interfaces

Miao-Shan Li(Miao-Shan Li) ; Yen-Chen Lin(Yen-Chen Lin) ; Chai-Chi Liu(Chai-Chi Liu) ; Ching-Rong Chang(Ching-Rong Chang) ; Jyun-Yi Li(Jyun-Yi Li) ; You-Sheng Lin(You-Sheng Lin) ; Ching-Yuan Yang(Ching-Yuan Yang)
https://doi.org/10.5573/JSTS.2019.19.1.001
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P.8

Investigation on Phase-change Synapse Devices for More Gradual Switching

Minkyu Shin(Minkyu Shin) ; Kyunghwan Min(Kyunghwan Min) ; Hayeon Shim(Hayeon Shim) ; Yongwoo Kwon(Yongwoo Kwon)
https://doi.org/10.5573/JSTS.2019.19.1.008
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P.18

Fabrication Methods for Nanowire Tunnel FET with Locally Concentrated Silicon-germanium Channel

Junil Lee(Junil Lee) ; Ryoongbin Lee(Ryoongbin Lee) ; Sihyun Kim(Sihyun Kim) ; Euyhwan Park(Euyhwan Park) ; Hyun-Min Kim(Hyun-Min Kim) ; Kitae Lee(Kitae Lee) ; Sangwan Kim(Sangwan Kim) ; Byung-Gook Park(Byung-Gook Park)
https://doi.org/10.5573/JSTS.2019.19.1.018
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P.24

Strain Effectiveness of Gate-all-around Silicon Transistors with Various Surface Orientations and Cross-sections

Kihwan Kim(Kihwan Kim) ; Saeroonter Oh(Saeroonter Oh)
https://doi.org/10.5573/JSTS.2019.19.1.024
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P.30

A 1-V 4.6-μW/channel Fully Differential Neural Recording Front-end IC with Current-controlled Pseudoresistor in 0.18-μm CMOS

Taeju Lee(Taeju Lee) ; Soonyoung Hong(Soonyoung Hong) ; Chongsoo Jung(Chongsoo Jung) ; Junghyup Lee(Junghyup Lee) ; Minkyu Je(Minkyu Je)
https://doi.org/10.5573/JSTS.2019.19.1.030
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P.42

Adaptive Density Control for Effective Overlap Removal in Analytical Floorplanning

Donghoon Yeo(Donghoon Yeo) ; Yu Wang(Yu Wang) ; Iksoon Lim(Iksoon Lim) ; Hyunchul Shin(Hyunchul Shin)
https://doi.org/10.5573/JSTS.2019.19.1.042
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P.50

Charge-based Quantum Correction Noise Model in Nanoscale MOSFETs

Jonghwan Lee(Jonghwan Lee) ; Daeki Hong(Daeki Hong)
https://doi.org/10.5573/JSTS.2019.19.1.050
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P.63

U-shaped Reconfigurable Field-effect Transistor

Daehoon Wee(Daehoon Wee) ; Hui Tae Kwon(Hui Tae Kwon) ; Won Joo Lee(Won Joo Lee) ; Hyun-Seok Choi(Hyun-Seok Choi) ; Yu Jeong Park(Yu Jeong Park) ; Boram Kim(Boram Kim) ; Yoon Kim(Yoon Kim)
https://doi.org/10.5573/JSTS.2019.19.1.063
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P.69

Impacts of Bottom-gate Bias Control for Low-voltage Memory Operations of Charge-trap Memory Thin Film Transistors using Oxide Semiconductors

Min-Tae Son(Min-Tae Son) ; So-Jung Kim(So-Jung Kim) ; Sung-Min Yoon(Sung-Min Yoon)
https://doi.org/10.5573/JSTS.2019.19.1.069
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P.79

An Efficient Digital-domain Calibration Technique for SAR ADCs using a Bridge Capacitor

Jae-Sik Yoon(Jae-Sik Yoon) ; Jintae Kim(Jintae Kim)
https://doi.org/10.5573/JSTS.2019.19.1.079
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