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The Journal of Semiconductor Technology and Science (JSTS) is an international, peer-reviewed, and open-access journal that is published bimonthly.
- Scope: semiconductor processes, devices, circuits, and MEMS.
- Editor-in-Chief: Prof. Woo Young Choi (ECE, Seoul National University)
- Indexed within Science Citation Index Expanded (SCIE), SCOPUS, Korea Citation Index (KCI), and other databases.

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Journal Archive

2025-08

P.335

Ultra-low Power Readout Circuit Design and Simulation using Dynamic Wheatstone Bridge Technique for Implantable Body Temperature Sensor Application

(Jounghoon Lim) ; (Jong Pal Kim)
https://doi.org/10.5573/JSTS.2025.25.4.335
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P.346

An 85.7 TOPS/W Analog-digital Combined In-memory Computing Accelerator for Mixed-precision Deep Neural Networks

(Byeongcheol Kim) ; (Wooyoung Jo) ; (Sangjin Kim) ; (Soyeon Um) ; (Hoi-Jun Yoo)
https://doi.org/10.5573/JSTS.2025.25.4.346
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P.355

A Reconfigurable Spiking Neural Network Computing-in-memory Processor using 1T1C eDRAM for Enhanced System-level Efficiency

(Sangmyoung Lee) ; (Seryeong Kim) ; (Soyeon Kim) ; (Soyeon Um) ; (Sangjin Kim) ; (Sanyeob Kim) ; (Wooyoung Jo) ; (Hoi-jun Yoo)
https://doi.org/10.5573/JSTS.2025.25.4.355
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P.363

Scalable Bit Partitioning for Hybrid Random Number Generation in Parallel Stochastic Computing

(Donghui Lee) ; (Yongtae Kim)
https://doi.org/10.5573/JSTS.2025.25.4.363
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P.375

A 22-nm FD-SOI CMOS 7.5-9.6 GHz CP PLL Used in Wifi7 Achieved 56 fs-RMS-jitter and -65 dBc Spur

(Xu She) ; (Yisha Xie) ; (Lintao Liu) ; (Aiying Guo)
https://doi.org/10.5573/JSTS.2025.25.4.375
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P.384

Analysis of FinFET Based Positive Feedback Symmetric Adiabatic Logic for Performance and Security Characteristics

(Bhuvana B P) ; (Prathiba A) ; (Kanchana Bhaaskaran V S)
https://doi.org/10.5573/JSTS.2025.25.4.384
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P.397

A Wide Input Range, Low-noise Neural Recording Amplifier IC With Adaptive Gain Control and Common-mode Cancellation Loop

(Boseong Park) ; (Soonseong Hong) ; (Hyouk-Kyu Cha)
https://doi.org/10.5573/JSTS.2025.25.4.397
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P.406

A Lightweight AES-256 Accelerator Design through Processing Order Optimization for Low-cost Hardware Security

(Yuseong Lee) ; (Jaehak Kang) ; (Jongmin Lee)
https://doi.org/10.5573/JSTS.2025.25.4.406
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P.414

Biased Poly-gate-separated Schottky Barrier Diode in CMOS

(Deokgi Kim) ; (Jaehyun Noh) ; (Wooyeol Choi) ; (Dongha Shim)
https://doi.org/10.5573/JSTS.2025.25.4.414
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P.420

Current-Voltage Modeling of 3D-NAND String Using Genetic Algorithm

(Gihong Park) ; (Jung Nam Kim) ; (Jun Hui Park) ; (Suk-Kang Sung) ; (Garam Kim) ; (Yoon Kim)
https://doi.org/10.5573/JSTS.2025.25.4.420
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