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The Journal of Semiconductor Technology and Science (JSTS) is an international, peer-reviewed, and open-access journal that is published bimonthly.
- Scope: semiconductor processes, devices, circuits, and MEMS.
- Editor-in-Chief: Prof. Woo Young Choi (ECE, Seoul National University)
- Indexed within Science Citation Index Expanded (SCIE), SCOPUS, Korea Citation Index (KCI), and other databases.

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Title Current-Voltage Modeling of 3D-NAND String Using Genetic Algorithm
Authors (Gihong Park) ; (Jung Nam Kim) ; (Jun Hui Park) ; (Suk-Kang Sung) ; (Garam Kim) ; (Yoon Kim)
DOI https://doi.org/10.5573/JSTS.2025.25.4.420
Page pp.420-426
ISSN 1598-1657
Keywords I-V modeling; 3D-NAND; BSIM-CMG; genetic algorithm; parameter extraction; compact modeling; tapered hole
Abstract This study presents a modeling approach for the current-voltage (I-V) characteristics of 3D-NAND flash memory using the BSIM-CMG (GEOMOD=3) transistor model combined with a genetic algorithm-based parameter optimization technique. Reference data were extracted from technology computer-aided design (TCAD) simulations for structures with one, three, and five word-line (WL) layers, and these data were utilized to optimize the parameters of the BSIM-CMG model. The results demonstrate that the I-V characteristics of 3D-NAND strings with up to 500 layers can be effectively represented, capturing variations in the I-V curves depending on the WL position on both linear and logarithmic scales. Furthermore, the current-voltage characteristics of tapered channel hole structures were successfully modeled. This work provides a robust framework for accurately simulating the electrical behavior of advanced 3D-NAND flash memory devices.