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Hazucha P., et al. , April 2005, Area-efficient linear regulator with ultra-fast load regulation, in IEEE Journal of Solid-State Circuits, Vol. 40, No. 4, pp. 933-940DOI
Lam Y., Ki W., Feb 2008, A 0.9V 0.35 μm Adaptively Biased CMOS LDO Regulator with Fast Transient Response, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, San Francisco, pp. 442-626DOI
Okuma Yasuyuki, al. et, Sep 2010, 0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS, IEEE Custom Integrated Circuits Conference 2010, pp. 1-4DOI
Huang M., et al. , July 2016, A Fully Integrated Digital LDO With Coarse–Fine-Tuning and Burst-Mode Operation, in IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63, No. 7, pp. 683-687DOI
Woo K., Kim T., Hwang S., Kim M., Yang B., Jan 2018, A fast-transient digital LDO using a double edge-triggered comparator with a completion signal, 2018 International Conference on Electronics, Information, and Communication (ICEIC), pp. 1-4DOI
Salem L. G., Warchall J., Mercier P. P., Feb. 2017, A 100nA-to-2mA successive-approximation digital LDO with PD compensation and sub-LSB duty control achieving a 15.1ns response time at 0.5V, in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, pp. 5-9DOI
Lim et al. C. Y., Aug 2017, A 50-mA 99.2% Peak current efficiency, 250-ns settling time digital low-dropout regulator with transient enhanced PI controller, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, No. 8, pp. 2360-2370DOI
Y.-J Lee et al. , Jan 2017, A 200mA digital low-drop-out regulator with coarse-fine dual loop in mobile application processors, IEEE Journal of Solid-State Circuits, Vol. 52, No. 1, pp. 64-76DOI
Akram M.-A., Hong W., Hwang I.-C., Sep 2018, Fast transient fully standardcell-based all digital low-dropout regulator with 99.97% current efficiency, IEEE Trans. Power Electron, Vol. 33, No. 9, pp. 8011-8019DOI
Akram M. A., Hong W., Hwang I., Jan 2019, Capacitorless Self-Clocked All-Digital Low-Dropout Regulator, in IEEE Journal of Solid-State Circuits, Vol. 54, No. 1, pp. 266-276DOI