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Authors Ki-Chan Woo;Byung-Do Yang
DOI https://doi.org/10.5573/JSTS.2019.19.5.492
Page pp.492-497
ISSN 1598-1657
Keywords Coarse-fine; digital LDO; oscillation; settling time; voltage differential detector
Abstract A digital low-dropout regulator (D-LDO) with a voltage differential detector for removing transient oscillation is proposed. The conventional D-LDO uses a coarse-fine method to reduce settling time and quiescent current. However, the coarse-fine method leads to transient oscillation when a large load current transition occurs. The proposed D-LDO removes the transient oscillation by using the voltage differential detector and dividing the coarse mode into matching and tracking modes. It was implemented using a 65 nm CMOS process. When the load current changes from 2 mA to 12 mA, the overshoot is 35 mV, the undershoot is 58 mV, and the settling time is 610 ns. The quiescent current is 7.04 μA.