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F. van der Goes , et. al. , 2014, A 1.5mW 68dB SNDR 80MS/s 2× Interleaved SAR-assisted pipelined ADC in 28nm CMOS, IEEE ISSCC, pp. 200-201DOI
V. Tripathi , et. al. , Sept. 2014, A 160 MS/s, 11.1 mW, single-channel pipelined SAR ADC with 68.3 dB SNDR, IEEE CICCDOI
J. Lin , et. al. , May 2011, A 15.5dB, Wide Signal Swing, Dynamic Amplifier Using a Common-Mode Voltage Detection Technique, IEEE ISCAS, pp. 21-24DOI
H.-Y. Lee, , et. al. , Jun. 2018, A 10-bit 100-MS/s Pipelined SAR ADC with Input Range Calibration and Digital Error Correction, AWAD, pp. 256-258Google Search
Y. Zhu , et. al. , June 2010, A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS, IEEE JSSC, pp. 1111-1121DOI
S.-M. Park , et. al. , Jun 2016, A 10-bit 20-MS/s Asynchronous SAR ADC with Meta-stability Detector using Replica Comparators, IEICE transaction on Electronics, Vol. E99-C, No. 6, pp. 651-654DOI
Lee C. C., Flynn M. P., 2011, A SAR-Assisted Two-Stage Pipeline ADC, IEEE JSSC, Vol. 46, No. 4, pp. 859-869DOI
Woo J.-K., , Mar 2014, 1.2 V 10-bit 75 MS/s Pipelined ADC With Phase-Dependent Gain-Transition CDS, IEEE transactions on VLSI Systems, Vol. 22, No. 3, pp. 585-592DOI
Park J.-S., , Apr 2014, A 12b 100MS/s Three-Step Hybrid Pipeline ADC Based on Time-Interleaved SAR ADCs, IEIE JSTS, Vol. 14, No. 2, pp. 189-197DOI
An T.-J., , Oct 2017, A Two-channel 10b 160 MS/s 28 nm CMOS Asynchronous Pipelined-SAR ADC with Low Channel Mismatch, IEIE JSTS, Vol. 17, No. 5, pp. 636-647DOI
Furuta M., , Apr 2011, A 10-bit, 40-MS/s, 1.21 mW Pipelined SAR ADC Using Single-Ended 1.5-bit/cycle Conversion Technique, IEEE JSSC, Vol. 46, No. 6, pp. 1360-1370DOI
Zhu \Y., , Sep 2012, A 50-fJ 10-b 160-MS/s Pipelined-SAR ADC Decoupled Flip-Around MDAC and Self-Embedded Offset Cancellation, IEEE JSSC, Vol. 47, No. 11, pp. 2614-2626DOI