Analysis of Electrical Characteristics Changes Due to Physical Parameter Variations
in Dual-Gate Feedback Field Effect Transistor
JeongHangwook1
KwonMin-Woo2,*
-
(Department of Electric Engineering, Gangneung-Wonju National
University, Gangneung, 25457, Korea
)
-
(Department of Electronic Engineering, Seoul National University of Science and Technology,
Seoul 01811, South Korea)
Copyright © The Institute of Electronics and Information Engineers(IEIE)
Index Terms
Steep switching, low power, beyond C-MOS, sensitivity, control gate, dual-gate, feedback FET
I. INTRODUCTION
Conventional MOSFETs have reached the physical limit of a subthreshold swing (SS)
of 60 mV/dec [1]. This physical limit of the SS value poses a significant challenge in reducing the
operating voltage of devices, as it leads to a substantial increase in standby power
due to leakage current [2]. As the demand for high switching speed and low-power device operation grows, various
beyond CMOS devices such as T-FET, NCFET, FEFET, and feedback field effect transistor
(FBFET) are being actively researched [3]. Among these, FBFET stands out due to its extremely low SS close to 0mV/decade and
high on/off ratio, making it a promising candidate for low-power operation and steep
switching behavior [4].
However, FBFETs operate more sensitively compared to conventional MOSFETs, especially
the Dual-Gate FBFET, which has more parameters and variables than conventional MOSFETs.
For instance, the Dual-Gate FBFET has two gates and four different doping levels in
the body, making device analysis more complex. Additionally, the device operates with
a very steep switching behavior due to its near 0mV/dec SS value, leading to high
operational sensitivity. Therefore, a thorough analysis of the electrical characteristics
resulting from changes in device parameters is crucial for the research and application
of these devices. Despite this, fundamental analyses of Dual-Gate FBFET devices remain
insufficient.
In this study, we analyze the impact of various parameters on the electrical characteristics
of Dual-Gate FBFET devices by altering each parameter and observing the resulting
electrical behavior. We examine the effects of changing the gate and control gate
lengths, oxide and body thicknesses, doping concentrations, and interface traps on
the device's electrical characteristics. By assessing the influence of these parameter
changes, we aim to identify which variations have the most critical impact on device
operation. We expect that this research will significantly contribute to future studies
and applications of highly sensitive Dual-Gate FBFET devices by providing a clear
analysis of their electrical characteristics. In this paper, for convenience, we refer
to Dual-Gate FBFET as FBFET.
II. ARCHITECTURE AND MECHANISM
Fig. 1 illustrates a schematic model of the FBFET structure. Fundamentally, the device shares
some similarities with conventional MOSFETs. The FBFET requires a silicon on insulator(SOI)
structure to form a potential barrier and well. The silicon body is doped with N${}^{+}$,
P${}^{-}$, N${}^{-}$, and P${}^{+}$ regions starting from the source area. The source
and drain are in contact with the N${}^{+}$ and P${}^{+}$ regions, respectively, while
the gate and control gate are positioned centrally, side by side, on top of the oxide.
Fig. 2 explains the operating principle of the FBFET using an energy band model. The following
describes each step of the energy band diagram in Fig. 2.
(1) The P${}^{-}$ region's energy band creates a potential barrier that blocks electrons
from the N${}^{+}$ region, while the N${}^{-}$ region forms a potential well that
prevents holes from the P${}^{+}$ region from crossing.
(2) When a positive voltage is applied to the gate, the potential barrier lowers,
allowing electrons from the N${}^{+}$ region to enter the potential well. Theses electrons
reduce the well's depth, enabling holes from the P${}^{+}$ region to move into the
P${}^{-}$ region. The presence of holes lowers the barrier, allowing more electrons
to cross over. This process repeats and accelerates, creating positive feedback.
(3) As the positive feedback continues, the potential barrier lowers, the well becomes
shallower, and the energy band flattens. Once flattened enough, the device current
flows rapidly.
Through this process, we can understand the basic operation of the FBFET. Additionally,
at the pre-operation stage, as shown in Fig. 2(1), the depth of the potential well can be adjusted by controlling the voltage of
the control gate. A deeper potential well delays the device's operation onset, indicating
that the control gate voltage can be used to adjust the device's threshold voltage
[5].
Fig. 2. FBFET operation mechanism.
III. ANALYSIS METHOD
1. Basic analysis information
The device analysis was conducted using SILVACO's T-CAD simulation. In this study,
the trap analysis applied the interface trap model.
The device threshold voltage was measured using the Constant Current method. The FBFET
has a SS close to 0mV, making it difficult to extract the differential value of the
characteristic curve. Therefore, the Constant current method is used instead of the
G${}_{m}$ max technique. For the Constant current method, the reasonable turn-on current
of the device is set to 10${}^{-6}$A. Given that the device exhibits an extremely
small SS value and a steep turn-on characteristic, minor deviations at 10${}^{-6}$
A can be disregarded, making the application of the Constant current method appropriate.
2. Parameter value
The analysis of the electrical characteristics in this study is based on observing
the variation of drain current with gate voltage sweep. Here, a drain voltage of 0.8V
and a control gate voltage of 2V were applied to form the potential well, while the
gate voltage was swept from 2V to 3V to observe the change in drain current.
Table 1 summarizes the design parameters of the device and doping concentrations used in
the study. For comparison of the effects of gate and control gate lengths, the lengths
of the gate and control gate were set to the same 200nm. The oxide thickness was 10nm,
and the body thickness, which determines the height of the channel, was 100nm. Regarding
doping concentrations, P${}^{-}$ doping was prioritized and applied to the entire
body, with the lowest doping concentration at 10${}^{17}$cm${}^{-3}$. Subsequently,
N${}^{-}$ doping was applied at 10${}^{18}$cm${}^{-3}$, and finally, dopants were
injected at a concentration of 10${}^{20}$cm${}^{-3}$ for N${}^{+}$ and P${}^{+}$.
Each parameter was chosen to optimize the observation of the device's electrical characteristics
and is unrelated to the superior performance indicators of the device.
Table 1. (a) Design parameters, (b) Doping concentrations.
IV. RESULTS AND DISCUSSION
The electrical characteristics of the device were measured by varying the lengths
of the gate and control gate, the thicknesses of the oxide and body, and the doping
concentrations, along with variations in traps.
1. Size variations
Fig. 3 presents a graph illustrating the electrical characteristics observed while varying
the lengths of the gate and control gate. The lengths of the gate and control gate
refer not only to the lengths of the contacted gate and control gate but also to the
inclusion of the silicon body beneath them. For example, doubling the gate length
means that the silicon body beneath the gate is also doubled in size.
Fig. 3. IV characteristics according to (a) Gate length variations and (b) Control
gate length variations. An increase in gate and control gate length leads to a rise
in threshold voltage.
(a)
(b)
The lengths of the gate and control gate were varied from 200nm to 400nm at intervals
of 50nm. It was observed that the threshold voltage increased with increasing lengths
of both the gate and control gate. Furthermore, the variations in characteristics
due to changes in gate length were more pronounced compared to changes in the control
gate.
Table 2 provides a summary of the changes in threshold voltage corresponding to variations
in the lengths of the gate and control gate. The rate of change in threshold voltage
due to variations in gate length was significantly higher compared to the rate of
change in threshold voltage due to variations in control gate length.
Table 2. Threshold voltage differences with Gate and Control gate length variations.
The effect of Gate length is more dominant than that of Control gate length.
Additionally, when comparing the total change in threshold voltage with reference
points of 200nm and 400nm, the change in threshold voltage due to variations in gate
length was 0.1 V, whereas for the control gate, it was 0.05 V. It was evident that
the change in threshold voltage due to variations in gate length was much greater.
Upon examining the rate and magnitude of threshold voltage change, it was confirmed
that variations in gate length had a greater impact on the electrical characteristics
of the device compared to variations in control gate length.
Fig. 4(a) shows the variations in electrical characteristics of the FBFET with changes in oxide
thickness. When the oxide thickness was varied from 10 nm to 40 nm at intervals of
10 nm, it was observed that the on-current remained constant, while the threshold
voltage increased with increasing thickness. This trend can be attributed to the FBFET
having a structure similar to MOSFET, and the increase in oxide thickness leads to
a decrease in the channel control ability of the gate.
Fig. 4. IV characteristics according to (a) Oxide thickness variations and (b) Body
thickness variations. An increase in oxide thickness raises the threshold voltage,
while an increase in body thickness raises both the threshold voltage and the on-current.
(a)
(b)
Fig. 4(b) illustrates a graph showing the variations in electrical characteristics of the FBFET
with changes in body thickness. When the body thickness was varied from 50nm to 250
nm at intervals of 50nm, it was observed that the threshold voltage increased, and
the on-current also increased.
Table 3. Threshold voltage differences with oxide and body thickness variations.
Table 3 provides a summary of specific numerical values. The increase in threshold voltage
with increasing body thickness can be understood as a result of the decrease in channel
control ability due to the increase in channel height. Moreover, the increase in on-current
with increasing body thickness is attributed to the increase in channel height, which
leads to an increase in on-current.
2. Doping concentration variations
Dual-Gate FBFET operates with two gates, the gate and control gate. The doping concentrations
of N${}^{+}$ and P${}^{+}$ at both ends are clear factors affecting the on-current
level after the device turns on. Therefore, we varied only the doping concentrations
of N${}^{-}$ and P${}^{-}$ that are considered meaningful for FBFET doping analysis
and examined the resulting graphs.
Fig. 5(a) shows the graph of the device's electrical characteristics when varying the doping
concentration of P${}^{-}$ in the body. It was observed that the on-current remained
constant while the threshold voltage increased as the P${}^{-}$ doping concentration
varied from $1\times1 ^{17}$ cm${}^{-3}$ to $7\times10 ^{17}$ cm${}^{-3}$.
Fig. 5. IV characteristics according to (a) P$^{-}$ body doping variations and (b)
N${}^{-}$ body doping variations. An increase in both P${}^{-}$ and N${}^{-}$ doping
concentrations raises the threshold voltage.}
(a)
(b)
Fig. 5(b) shows the graph of the device's electrical characteristics when varying the doping
concentration of N${}^{-}$ in the body. When the N${}^{-}$ body doping concentration
was varied from $1\times10 ^{18}$ cm${}^{-3}$ to $9\times10 ^{18}$ cm${}^{-3}$, the
on-current remained constant, with a slight increase in the threshold voltage.
Table 4 summarizes the differences in threshold voltage due to doping concentration variations.
Interestingly, despite the baseline concentration of N${}^{-}$ being higher at 1?10${}^{18}$cm${}^{-3}$
compared to the baseline concentration of P${}^{-}$ at 1?10${}^{17}$cm${}^{-3}$, the
change in threshold voltage was smaller when the N${}^{-}$ concentration was varied
by threefold, fivefold, and sevenfold. This observation suggests that changes in P${}^{-}$
doping in the body have a more significant impact on the device compared to N${}^{-}$
doping.
Table 4. Threshold voltage differences with doping concentration variations. The effect
of P${^{-}$ doping is more dominant than that of N${}^{-}$ doping.
3. Interface Trap variations
Interface traps in FBFET occur at the boundary between the silicon body and the oxide
layer. We classified the application of interface traps into those applied to the
gate and control gate separately, as well as those applied to the entire range, and
aimed to assess the influence of trap density and trap level variations on interface
traps.
Fig. 6 depicts the graph of electrical characteristic variations when interface traps are
applied below the gate or control gate ranges, with trap density varied. In this case,
the trap level is kept constant at 0.56 eV. It is observed that regardless of the
position of the gate or control gate, an increase in interface trap density leads
to an increase in threshold voltage.
Fig. 6. IV characteristics according to Trap density variations. An increase in both
Gate trap and Control gate trap density leads to increase in threshold voltage.
(a)
(b)
Table 5. Threshold voltage differences with Trap density variations. The effect of
Gate trap is more dominant than that of Control gate trap.
Table 5 summarizes the changes in threshold voltage within the range of trap densities from
$9\times10^{11}$ cm${}^{-3}$ to $5\times10 ^{12}$ cm${}^{-3}$, as shown in Fig. 6. It is notable that the change in threshold voltage due to the application of gate
interface traps is significantly larger compared to that of the control gate. Additionally,
Fig. 7 presents the results of observing electrical characteristic variations with interface
trap density changes applied to the entire range.
Fig. 7. IV characteristics according to Trap density across the entire range.
Fig. 8 illustrates the graph of electrical characteristic variations when interface traps
are applied below the gate or control gate ranges, with trap level varied. Both graphs
show that threshold voltage increases with an increase in trap level.
Fig. 8. IV characteristics according to Trap level variations. An increase in both
Gate trap and Control gate trap level leads to increase in threshold voltage.
(a)
(b)
Table 6 summarizes the changes in threshold voltage with variations in trap level, as depicted
in Fig. 8. It is notable that the changes in threshold voltage due to variations in gate trap
level are significantly larger compared to those resulting from variations in control
gate trap level. Additionally, Fig. 9 presents the graph of observing electrical characteristic variations with changes
in trap level applied to the entire range.
Table 6. Threshold voltage differences with Trap level variations. The effect of Gate
trap is more dominant than that of Control gate trap.
Fig. 9. IV characteristics according to Trap level across the entire range.
4. Discussion
The increase in the lengths of the gate and control gate leads to an increase in channel
length, resulting in an increase in threshold voltage. As the gate length increases,
it delays the accumulation of electrons in the potential well because the longer channel
slows down the electron transport. This is similar to the decrease in current observed
in conventional MOSFETs when the channel length increases [6]. In contrast, an increase in control gate length leads to an extension of the potential
well, requiring more charge to raise the energy band sufficiently. Therefore, increases
in both the gate and control gate lengths delay the FBFET's operation time.
An increase in oxide thickness reduces the gate's control over the channel, leading
to an increase in the threshold voltage [7]. This reduced control means a higher gate voltage is required to lower the potential
barrier sufficiently, resulting in an overall increase in threshold voltage.
An increase in body thickness leads to an increase in the on-current. Since FBFETs
must maintain electrons and holes in the feedback mechanism, they are fabricated on
SOI wafers. Once the FBFET turns on, the entire body acts as the channel. Thus, a
thicker body increases the channel height, enhancing the on-current.
An increase in doping concentration leads to an increase in threshold voltage. Specifically,
an increase in P${}^{-}$ doping concentration raises the potential barrier, thereby
increasing the threshold voltage. Similarly, an increase in N${}^{-}$ doping concentration
increases the depth of the potential well, also resulting in a higher threshold voltage.
An increase in the concentration of interface traps also raises the threshold voltage.
On the gate side, as the density and energy level of the interface traps increase,
more electrons from the source are trapped during the feedback mechanism, decreasing
the interface potential and raising the energy band [8,9]. As a result, more voltage must be applied to the gate to turn the device on. Additionally,
mobility decreases due to the interface traps, causing both an increase in threshold
voltage and a reduction in on-current [10]. On the control gate side, increased interface trap density and level cause holes
from the drain to be trapped during the feedback mechanism, raising the interface
potential and lowering the energy band. This deepens the potential well, requiring
more time to turn the device on. Therefore, the threshold voltage increases and the
on-current decreases due to the interface traps.
In the variations of length, doping concentration, and trap density, it was observed
that changes in parameters in the gate region led to larger variations compared to
changes in parameters in the control gate region. This phenomenon can be understood
through the operational process of the FBFET.
Fig. 10 shows the I${}_{d}$-V${}_{g}$ graph of the FBFET alongside the energy bands representing
the operational principles of the FBFET. The operational points are categorized into
three regions. Let's closely examine region 2 (the point at which the device turns
on). Changes in the parameters of the control gate alter the depth and length of the
potential well, thus influencing the operational point of the device. However, it's
essential to remember that the filling of free electrons in the potential well and
the occurrence of positive feedback fundamentally result from the prior lowering of
the potential barrier in the gate region. Ultimately, the device's operational point
heavily depends on the potential barrier in the gate region. Through this, it becomes
evident how changes in gate parameters have a more pronounced effect on the operational
point of the device compared to changes in control gate parameters.
Fig. 10. IV characteristic of FBFET and energy band.
V. CONCLUSIONS
Various steep switching devices have been researched, and among them, we examined
the electrical characteristic changes of the FBFET with variations in device parameters.
Through this study, we found that changes in gate parameters have a more significant
impact on the threshold voltage characteristics of the device compared to changes
in control gate parameters. The FBFET is highly sensitive, requiring thorough analysis
for both research and practical applications. This study holds significant value due
to the lack of detailed analysis on the electrical characteristics of dual-gate FBFETs
with varying parameters.
Additionally, the FBFET has a significant drawback in its large hysteresis characteristics
[11]. The inherent mechanism of the FBFET leads to a critical issue where the device does
not easily turn off even under reverse bias after turning on. So, adjusting the drain
voltage is required to turn off the device in a logic circuit. Despite this disadvantage,
the device has significant potential because it consumes far less energy compared
to conventional MOSFETs, due to its SS being close to 0 [12]. Additionally, its ability to adjust operation time by controlling the control gate
voltage is a strong advantage, making it a promising candidate for use in logic operation
systems [13].
The advantages of the FBFET are clear. It exhibits a very steep switching characteristic
with an SS close to 0 mV/dec, enabling high-speed and low-power operation. Therefore,
it is crucial to conduct focused additional analysis and follow-up research to mitigate
the disadvantages of the device while maximizing its advantages.
ACKNOWLEDGMENTS
This study was supported by the Research Program funded by the SeoulTech(Seoul
National University of Science and Technology).
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Hangwook Jeong is currently pursuing a bachelor's degree in the Department of
Electronic Enginee- ring at Gangneung-Wonju Nation- al University (GWNU). He is con-
ducting research on the analysis of next generation semiconductor FBFET device characteristics
and the study of In-memory computing using FBFETs at the Intelligent Semiconductor
Device & Circuit Design Laboratory (ISDL).
Min-Woo Kwon received his B.S. and Ph.D. degrees in Electrical and Computer Engineering
from Seoul National University (SNU) in 2012 and 2019, respectively. From 2019 to
2021, he worked at Samsung Semiconductor Laboratories, where he contributed to the
development of 1x nm DRAM cell. From 2021 to 2024, he worked at Gangneung-Wonju National
University (GWNU) as an assistant professor in the Department of Electric Engineering.
Since 2024, he has been conducting research in the Department of Electronic Engineering
at Seoul National University of Science and Technology, where he is currently a professor