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1. (Department of Electrical Engineering, Pusan National University, Busan 46241, Korea )
2. (Power Semiconductor Research Center, Korea Electrotechnology Research Institute, Changwon 51543, Korea)
3. (School of Electronic Engineering, Kumoh National Institute of Technology, Gumi 39177, Korea)

SiC, power device, Edge termination, JTE, FGR

## I. INTRODUCTION

4H-Silicon carbide (SiC) has attracted attention as a next-generation power semiconductor material owing to its wide band gap (3.26 eV), high critical electric field (EC = 3 MV/cm), and high thermal conductivity (4.9 W/cm·℃). These properties make it suitable for high-power, high-frequency, and high-temperature operation. Moreover, the high EC provides the significant advantages of a low on-resistance and excellent reverse blocking characteristics (1,2).

Several edge termination structures for SiC power devices, such as the field plate (3,4), floating guard ring (FGR) (5,6), mesa-etched termination (7), and junction termination extension (JTE) (8-10), have been investigated by various groups. A reduction in breakdown voltage (BV) due to unexpected process conditions has been reported (11,12). To obtain stable blocking characteristics regardless of process deviations, new edge termination structures are necessary (13-16). It is well known that the surface charge density (Qsurf/q) at the interface between SiC and a passivation layer affects the operation of power devices (17,18). Post-oxidation annealing in NO or N2O ambient has been widely used to reduce Qsurf/q. In addition, it is a well-validated method of improving the channel mobility of n-channel SiC metal-oxide-semiconductor field-effect transistors (19-21). In both the NO and N2O processes, a negative surface charge density is formed on the n-type SiC surface (22). The presence of the Qsurf/q affects the E-field distribution along the surface at the edge termination structures. The blocking characteristics of ultrahigh-voltage devices are strongly affected by the surface charge density because of the relatively low doping concentration in the drift layer and long termination length.

The JTE is typically used in power devices owing to its simple design and processes. It exhibits a high BV when the implantation dose in the JTE region is close to the cross-sectional concentration in the drift layer (8,9). Although the ion implantation dose can be precisely controlled, the profiles of depletion regions in the drift layer are affected by the charge states at the SiC/passivation layer interface and by the activation efficiency of implanted ions (11,23).

The FGR is also widely used as an edge termination structure because it effectively reduces E-field crowding (5,24). Also, gradually increasing ring-space structure for FGR was reported to obtain high breakdown voltage (25). However, the design of FGR structures is complicated because various design and process parameters such as the ring space, ring width (WFGR), doping concentration, and surface charge density should be considered. A narrow space is required near the main junction to transfer potential from anode to edge termination regions. In case of outer regions of termination, a relatively wide space is required for large potential drops to obtain uniform E-field distribution and high breakdown voltage. CS-FGR may not be suitable for uniform E-field distribution because of the constant value of spaces.

The ring spaces are affected by the conditions required for processes such as photolithography, hard mask etching, and high-temperature annealing to diffuse the implanted ions. For these reasons, the process conditions must be accurate and repeatable to provide a consistent ring space and blocking characteristics (26). In addition, photoresist and hard mask layers have a non-perpendicular slope after patterning processes; consequently, the implantation window can differ from the intended pattern width at the photomask (27,28). Moreover, the width of the photoresist pattern may be also affected by the exposure time during photolithography processes (29). Note that lateral straggling of implanted ions increases WFGR by 0.2-0.3 μm, which considerably changes the depletion shape in the drift regions (30).

In this study, we investigated the BV characteristics of edge termination structures, including the JTE, constant space FGR (CS-FGR), and gradually increasing space FGR (GIS-FGR), with a focus on process deviations. The effects of Qsurf/q and the ring space variation on the BV were analyzed, and the electrical stability was evaluated. The BV of a proposed GIS-FGR is sufficiently stable for 6.5 kV SiC power devices against the Qsurf/q and ring space variation.

## II. SIMULATION MODEL AND DEVICE STRUCTURE

Numerical device simulations were performed using the Silvaco TCAD simulator. The parallel electric-field dependence, Shockley-Read-Hall recombination, Auger recombination, and band gap narrowing models were used for breakdown analysis. The avalanche breakdown was simulated using the impact ionization model of Selberherr (31,32). Fig. 1 schematically illustrates the structures of the JTE, CS-FGR, and GIS-FGR. The thickness and doping concentration of the drift layer were 55 μm and 1 × 1015 cm-3, respectively. The simulated BV of the ideal parallel-plane junction with these parameters was 12.4 kV.

Fig. 1. Schematic illustrations of structures of (a) JTE, (b) CS-FGR, (c) GIS-FGR.

We assumed that a passivation layer is formed by the following processes: thermal oxidation of 50-nm-thick SiO2, post-oxidation annealing in NO ambience, and deposition of 1-μm-thick SiO2. The length and doping concentration of the JTE ranged from 50 to 300 μm and 1.5 × 1017 to 4.5 × 1017 cm-3, respectively. Both the CS-FGR and GIS-FGR had 50 rings and a WFGR value of 1.5 μm. The nth ring space is determined using Eq. (1).

##### (1)
$$S_{1}+(n-1) S_{i}=S_{n}$$

where S1 is the first ring space, and Si is the increment of the ring space for the GIS-FGR. S1 of the GIS-FGR was fixed at 1 μm. In addition, Si was varied from 0.05 to 0.3 μm to analyze the blocking characteristics.

## III. SIMULATION RESULTS AND DISCUSSION

Fig. 2(a) shows the BVs of JTEs with various doping concentrations (NJTE) without considering surface charges. We obtained a maximum BV of 10,481 V at NJTE = 2.5 × 1017 cm-3. The BVs for various JTE lengths (LJTE) are shown in Fig. 2(b), and the inset shows the E-field distribution for LJTE = 200 μm. No significant improvement was observed at LJTE values exceeding 200 μm. Fig. 2(c) shows the Qsurf/q dependence of the BV for NJTE = 2.5 × 1017 cm-3 and LJTE > 200 μm. The BV changes when the Qsurf/q value on the SiC surface is negative because the surface charges affect the NJTE value at the maximum BV.

Fig. 2. Simulated BV for various values of JTE parameters (a) NJTE, (b) LJTE, (c) Qsurf/q.

Table 1-1 and 1-2 present the blocking characteristics of SiC devices using a JTE, including the average BV and its standard deviation against NJTE and Qsurf/q variations, respectively. The JTE structure with NJTE = 2.5 × 1017 cm-3 and LJTE = 200 μm exhibited a high average BV of 10,040 V. The average BVs of the JTE structures with different NJTE values are lower than those of the device with NJTE = 2.5 × 1017 cm-3. In addition, the BVs of JTE structures with various NJTE values showed very large standard deviations of 45-57%, indicating that the BV of the JTE structure depends strongly on NJTE.

Table 1-1. Blocking characteristics of JTE in process deviations (Qsurf/q = 0 to -1 × 1012 cm-2) NJTE

 NJTE (cm-3) Average BV (V) Standard deviation (%) 1.5 × 1017 7030 5 2.5 × 1017 10040 10 3.5 × 1017 3250 3

Table 1-2. Blocking characteristics of JTE in process deviations (NJTE = 1.5 × 1017 to 4.5 × 1017 cm-3)

 Qsurf/q (cm-2) Average BV (V) Standard deviation (%) 0 5620 57 -1 × 1011 5680 57 -5 × 1011 5910 57 -1 × 1012 5460 45

Fig. 3 shows the BVs of CS-FGR structures with ring spaces of 1.1 to 3.8 μm. For a ring space of 2 μm, the maximum BV was 6,840 V; the corresponding E-field distribution is shown in the inset. When the ring space is narrower or wider than 2 μm, the BV of the CS-FGR structures is much lower. The ring space can change not only during the patterning process but also during the implantation processes because lateral straggling of Al ions can result in a narrow ring space (13).

Fig. 4 shows the BV versus the ring space variation (−0.3 to +0.3 μm) at Qsurf/q = 0, −1 × 1011, −5 × 1011, and −1 × 1012 cm-2. The ring space and Qsurf/q affect the BV because variation of these parameters changes the optimal point of space. However, the CS-FGR structures have a nonuniform E-field distribution, as shown in the inset, because a potential drop occurs along the CS-FGR structure.

As shown in Table 2-1 and 2-2, the blocking characteristics of the CS-FGR structures may not provide the required BVs for 6.5 kV devices.

Fig. 3. BV of CS-FGR versus ring space.

Fig. 4. BV of CS-FGR versus ring space variation for various Qsurf/q.

Table 2-1. Blocking characteristics of CS-FGR with process deviations (Space variation = -0.3 to +0.3 μm) Qsurf/q

 Qsurf/q (cm-2) Average BV (V) Standard deviation (%) 0 6256 8 -1 × 1011 6264 9 -5 × 1011 6163 13 -1 × 1012 6106 18

Table 2-2. Blocking characteristics of CS-FGR with process deviations (Qsurf/q = 0 to -1 × 1012 cm-2)

 Space variation (μm) Average BV (V) Standard deviation (%) -0.3 4854 7 0 6750 4 +0.3 6187 6

A ring space adjacent to the main junction must be narrow to deliver potential from the main junction to edge termination structures. However, other spaces that are further from the main junction must be wide enough to afford an effective potential drop across the edge termination structures; consequently, a gradually increasing space can provide stable blocking characteristics (25). Fig. 5 shows the BVs of simulated GIS-FGR structures with various Si. The insets show the E-field distributions for Si = 0.05 and 0.15 μm. When Si = 0.15 μm, the E-field is crowded in front of the GIS-FGR structure. The GIS-FGR with Si = 0.05 μm has a wide E-field distribution and high BV (>10 kV).

Fig. 6 shows the BVs of GIS-FGR structures versus ring space variation for various Qsurf/q values. The GIS- FGR structure has an excellent E-field distribution even when the ring space is unintentionally varied during patterning. The BV for Si = 0.15 μm tends to increase for negative Qsurf/q values because for negative Qsurf/q, the depletion regions are extended along the surface (23). By contrast, BV decreases when Si = 0.05 μm because the E-field is distributed uniformly; consequently, it is rather sensitive than that at Si = 0.15 μm. For a large Qsurf/q and narrow ring space, the depletion regions exhibit rapid lateral expansion, and E-field crowding occurs at the end of the final ring.

Fig. 5. BV of GIS-FGR versus Si.

Fig. 6. BV of GIS-FGR versus ring space variation for various Qsurf/q, and Si values.

Table 3-1 and 3-2 show the average and standard deviation of the BV of the GIS-FGR structures when Si = 0.05 or 0.15 μm for Qsurf/q and ring space variations, respectively. We obtained fairly a small standard deviation of 2% against Qsurf/q variation from 0 to -1 × 1012 cm-2. Despite the surface charge density and ring space variation, we obtained a high BV (>8 kV) for the GIS-FGR with Si = 0.05 μm. We verified that the GIS-FGR is sufficiently stable for use in 6.5 kV SiC power devices despite process deviations during photolithography, etching, and ion implantation.

Table 3-1. Blocking characteristics of GIS-FGR in process deviations (space variation = -0.3 to +0.3 μm)

 Si (μm) Qsurf/q (cm-2) Average BV (V) Standard deviation (%) 0.15 0 6850 3 -1 × 1011 6920 3 -5 × 1011 7220 2 -1 × 1012 7570 2 0.05 0 9480 7 -1 × 1011 9520 7 -5 × 1011 9550 7 -1 × 1012 9590 8

Table 3-2. Blocking characteristics of GIS-FGR in process deviations (Qsurf/q = 0 to -1 × 1011 cm-2)

 Si (μm) Space variation (μm) Average BV (V) Standard deviation (%) 0.15 -0.3 7120 4 0 7070 4 +0.3 6950 4 0.05 -0.3 8390 6 0 10180 2 +0.3 8500 3

## IV. CONCLUSIONS

The effects of process deviations on the blocking characteristics of 6.5 kV SiC power devices were investigated to obtain devices that are unaffected by these variations. Simulations of a JTE structure showed that the standard deviation of the BV was 45-57% for various NJTE values. Moreover, the presence of Qsurf/q changed the optimal NJTE value. A CS-FGR showed standard deviations of 4-18% and an average BV of 6,750 V owing to a nonuniform E-field. For a GIS-FGR with Si = 0.05 μm, the standard deviation was 2-8%. In addition, we obtained a maximum average BV of 10,180 V, and a high BV (>8 kV) was obtained for various ring space variation and Qsurf/q values. Our results, including the electrical characteristics and validation of the effects of process deviations, provide stable blocking capability for 6.5 kV SiC power devices.

### ACKNOWLEDGMENTS

This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. 2021R1G1A1003487)

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## Author

##### Junki Jung

Junki Jung received the B.S. degree (2019) from Gyeongsang National University.

Since 2019, He has been in the M.S. degree course at Pusan National University, Korea.

His research interests include wide bandgap power semiconductors, such as SiC device

##### Ogyun Seok

Ogyun Seok received the B.S. degree (2008) from Kookmin University, Seoul and Ph.D. degree (2013) in Department of Electrical and Computer Engineering from Seoul National University, Seoul, Korea.

From 2013 to 2014, he was a postdoctoral Researcher in Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign in USA.

His researches at Seoul National University and University of Illinois at Urbana-Champaign were power GaN HEMTs and GaN MOS-HEMTs using high-k gate stacks and Au-free electrodes for CMOS compatible processes.

He joined Power Semiconductor Research Center at Korea Electrotechnology Research Institute in Korea as Senior Researcher.

He developed SiC power semiconductor devices including SiC planar MOSFET, SiC trench MOSFET, SiC Schottky barrier diode and SiC trench diode.

Since 2020, he has been with Kumoh National Institute of Technology, Gumi, Korea, where he is an Assistant Professor in School of Electronic Engineering.

He has published 35 papers in international journals.

His research interests include GaN, SiC, Diamond power transistors.

##### In Ho Kang

In Ho Kang received Ph.D. degree from the Department of Information and Communications in Gwangju Institute of Science and Technology in 2004, Korea.

Since 2006, he has been a Principal Researcher in Power Semiconductor Research Center at Korea Electro-technology Research Institute.

##### Hyoung Woo Kim

Hyoung Woo Kim received B.S., M.S. and Ph.D. degree from the Department of Electrical and Computer Engineering, Ajou University, Suwon, Korea in 1998, 2000 and 2018, respectively.

He is currently technical leader of Power Semiconductor Research Center of Korea Electrotechnology Research Institute

##### Wook Bahng

Wook Bahng received Ph.D. degree (1997) in Material Science and Engineering from Seoul National University, Seoul, Korea.

He was a visiting researcher Electro-technical Laboratory, Tsukuba, Japan from 1997 to 2000.

Since 2000, he has been a Principal Researcher in Power Semiconductor Research Center at Korea Electro-technology Research Institute.

Now, he is a Director of the Research Center.

##### Hojun Lee

Hojun Lee received the Ph.D. degree from Seoul National University in 1996.

Since 2001, he has been with Pusan National University, Korea, where he is professor in Department of Electrical Engineering.

His research interests include wide bandgap power semiconductors and plasma system modeling & analysis, such as CCP and MICP.