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  1. (Graduate School of IT Convergence Engineering, Gachon University, Seongnam-si, Gyeonggi-do 13120, Korea)
  2. (Department of Electronics Engineering, Gachon University, Seongnamsi, Gyeonggi-do 13120, Korea)

DC compact model, TFET, devicecircuit co-optimization, device simulation, circuit simulation, HSPICE, circuit design


Metal-oxide-semiconductor field-effect transistor (MOSFET) has the lower limit in subthreshold swing ($\textit{S}$) by the thermionic emission, which is 60 mV/dec. Tunneling field-effect transistor (TFET) has been widely studied owing to its steep switching characteristics with $\textit{S}$ smaller than the lower being operated by band-to-band tunneling, which presents the strong low-power operation capability [1-6]. Also, TFET shows a very low off-state current since the tunneling distance between the source valence band, and the drain conduction band becomes effectively long when the device is turned off. A weak point of TFET can be ambipolar current. For an $\textit{n}$-type TFET, when the gate voltage ($\textit{V}$$_{\mathrm{GS}}$) is swept in the negative direction above a certain bias, there can be an undesirable current increase which is mainly due to the band-to-band tunneling through the drain-channel junction and can be interpreted as an unintended $\textit{p}$-type TFET operation. There has been effort to minimize the ambipolar current by either gate-drain underlap or doping profile control over the channel and drain [7,8]. TFET device can be simulated and optimally designed by technology computer-aided design (TCAD) simulation but its performance evaluation in the circuit design has not been effectively carried out due to the absence of a highly reliable circuit model of TFET. Although several models have been reported in the previous literature, some of them are too much simplified and some are excessively complicated without assuring high accuracy based on physical modeling [9-17].

In this work, a simple and accurate SPICE model of TFET which can be utilized in the circuit simulation has been developed. Series of device simulations are performed to prepare the current characteristics of TFET, and then, a compact model applicable in the circuit design by HSPICE simulation is built based on the characteristics. The equations for transfer and output characteristics are not just the fitting results by arbitrary functions but are from the physics-based modeling. The model complexity and accuracy are iteratively balanced to provide a highly practical and reliable compact model. Furthermore, particular effort has been made to reflect the ambipolar current in the negative operation region for more realistic circuit design, where accurate power consumptions can be calculated in the higher level digital and analog designs.


1. Device Simulation Strategies

Fig. 1. Schematic of the simulated TFET device structure. Aerial view (left) and cross-sectional view (right).


An all-Si, i.e., Si homojunction two-dimensional (2-D) silicon-on-insulator (SOI) TFET is designed for higher universality, as schematically shown in Fig.1, which provides the current characteristics under various bias conditions that an actually fabricated device might have provided. For higher accuracy of device simulation results, multiple models including concentration-dependent generation-recombination model, bandgap narrowing model, Fermi-Dirac statistics model are simultaneously activated with performing the non-local band-to-band tunneling calculation [18].

In order to increase gate controllability, a high-${\kappa}$ dielectric of HfO$_{2}$ with a thickness of 3 nm is employed as the gate dielectric. The physical thickness of 3 nm is translated to an equivalent oxide thickness (EOT) of 0.56 nm which is suggested by the most recent technology roadmap for achieving within near years [19]. The channel length and thickness are 150 nm and 50 nm, respectively. The source junction is degenerately doped with $\textit{p}$-type 2${\times}$10$^{20}$ cm$^{-3}$, which bends the band between source and channel for lowering the gate voltage for current on-set. The channel region and drain junctions are doped with $\textit{n}$-type 10$^{17}$ cm$^{-3}$ and $\textit{n}$-type 5${\times}$10$^{18}$ cm$^{-3}$, respectively, for suppressing the band-to-band tunneling at the drain side.

2. Mathematical Formalism with Bias Dependency

Fig. 2. Energy-band diagrams for a degenerately doped \textit{pn} homojunction with (a) zero bias, (b) reverse bias.


Figs.2(a) and (b) schematically show a homojunction with degenerately doped $\textit{n}$- and $\textit{p}$-type regions under zero and reverse bias conditions, respectively. Here, $\textit{E}$$_{\mathrm{Fl}}$ and $\textit{E}$$_{\mathrm{Fr}}$ are the Fermi levels on the left- and right-side regions, respectively. Also, $\textit{E}$$_{\mathrm{cn}}$ and $\textit{E}$$_{\mathrm{vp}}$ are the conduction band minimum in the $\textit{n}$-type region and the valence band maximum in the $\textit{p}$-type region, respectively. The equation for band-to-band tunneling current can be expressed as Eq.(1) in consideration of the effects of two-dimensional (2-D) density of states (DOS) [20].

$$ J=\frac{q m_{r}}{2 \pi^{2} \hbar^{3}} \iint\left(f_{l}-f_{r}\right) \cdot T_{\mathrm{WKB}}\left(E_{y}\right) d E_{y} d E_{x} $$

Here, $\textit{m}$$_{\mathrm{r}}$ is the reduced effective mass, and for Si, $\textit{m}$$_{r}$ = (1/$\textit{m}$$_{e}$$^{\mathrm{*}}$ + 1/$\textit{m}$$_{h}$$^{\mathrm{*}}$)$^{-1}$ = 0.203 $\textit{m}$$_{0}$. $\textit{f}$$_{\mathrm{l}}$ and $\textit{f}$$_{\mathrm{r}}$ are the Fermi-Dirac distribution functions on the left- and right-side regions in Fig.2(a) and (b), and expressed as Eq. (2,3).

$$ f_{l}(E)=\frac{1}{1+\exp \left[\left(E-E_{F l}\right) / k T\right]} $$

$$ f_{r}(E)=\frac{1}{1+\exp \left[\left(E-E_{F r}\right) / k T\right]} $$

$\textit{T}$$_{\mathrm{WKB}}$ is the tunneling probability calculated by the Wentzel-Kramer-Brillouin (WKB) approximation and is expressed as Eq.(4):

$$ T_{\mathrm{WKB}}\left(E_{y}\right) \approx \exp \left(-\frac{4 \sqrt{2 m_{\mathrm{r}}} E_{g}^{\frac{3}{2}}}{3 q \hbar F}\right) \exp \left(-\frac{E_{y}}{\bar{E}}\right) $$

$\textit{E}$$_{\mathrm{g}}$ is the energy bandgap of the given material and $\textit{F}$ is the maximum electric field across the junction. $\bar{E}=q F \hbar / 2\left(2 m_{r} E_{g}\right)^{1 / 2}$ is the expected difference in energies that a quantum particle with an effective mass $\textit{m}$$_{\mathrm{r}}$ has on the left and the right sides of the tunneling junction under the maximum electric field $\textit{F}$. $\textit{E}$$_{x}$ and $\textit{E}$$_{y}$ in Eqs.(1) and (4)are the longitudinal and the transverse electron energies, respectively. Eq.(1) can be further proceeded to Eq.(5):

$$ \begin{aligned} J &=\frac{q m_{r}}{2 \pi^{2} \hbar^{3}} \iint\left(f_{l}-f_{r}\right) \cdot T_{\mathrm{WKB}}\left(E_{y}\right) d E_{y} d E_{x} \\ &=\frac{q m_{r}}{2 \pi^{2} \hbar^{3}} \int_{0}^{\infty} T_{\mathrm{WKB}}\left(E_{y}\right) d E_{y} \cdot \int\left(f_{l}-f_{r}\right) d E_{x} \end{aligned} $$

Plugging Eq.(2) through (4)into Eq.(5) and performing the multi-variable integration lead to Eq.(6) below [21]:

$J=\frac{q^{2} F \sqrt{2 m_{r}}}{8 \pi^{2} \hbar^{2} \sqrt{E_{g}}} \exp \left(\frac{-4 \sqrt{2 m_{\mathrm{r}}} E_{g}^{\frac{3}{2}}}{3 q \hbar F}\right) \int_{E_{vn}}^{E_{cn}}\left(f_{l}-f_{r}\right) d E$ $\approx \frac{q^{2} k T \cdot F \sqrt{2 m_{r}}}{8 \pi^{2} \hbar^{2} \sqrt{E_{g}}} \exp \left(\frac{-4 \sqrt{2 m_{\mathrm{r}}} E_{g}^{\frac{3}{2}}}{3 q \hbar F}\right)$ \[ \times \ln \left(\frac{\exp \left[\left(E_{F r}-E_{c n}\right) / \mathrm{kT}\right] \exp \left[\left(E_{v p}-E_{F l}\right) / \mathrm{kT}\right]}{\exp \left[\left(E_{F l}-E_{c n}\right) / \mathrm{kT}\right] \exp \left[\left(E_{v p}-E_{F r}\right) / \mathrm{kT}\right]}\right) \]

The natural logarithm in Eq.(6) can be substituted with Eqs.(7) and (8)obtained by the implications from Fig.2(a) and (b), which leads to the current density in Eqs.(6) and (9)[22].

$$ \begin{array}{l} {\exp \left(\frac{E_{c n}-E_{F r}}{k T}\right)=\exp \left[\frac{\left(E_{c n}-E_{F l}\right)+\left(E_{F l}-E_{F r}\right)}{k T}\right]} \\ {=\exp \left(\frac{E_{c n}-E_{F l}}{k T}\right) \cdot \exp \left(\frac{E_{F l}-E_{F r}}{k T}\right)=\frac{N_{c}}{n_{0}} \exp \left(-\frac{q V_{A}}{k T}\right)} \end{array} $$

$$ \begin{aligned} &\exp \left(\frac{E_{v p}-E_{F l}}{k T}\right)=\exp \left[\frac{\left(E_{v p}-E_{F r}\right)+\left(E_{F r}-E_{F l}\right)}{k T}\right]\\ &=\exp \left(\frac{E_{v p}-E_{F r}}{k T}\right) \cdot \exp \left(\frac{E_{F r}-E_{F l}}{k T}\right)=\frac{p_{0}}{N_{v}} \exp \left(\frac{q V_{A}}{k T}\right) \end{aligned} $$

$$ J\left(F, V_{A}\right)=\frac{q^{3} \cdot F \sqrt{2 m_{r}} \cdot V_{A}}{4 \pi^{2} \hbar^{2} \sqrt{E_{g}}} \exp \left(\frac{-4 \sqrt{2 m} E_{g}^{\frac{3}{2}}}{3 q \hbar F}\right) $$

From the fact that the maximum electric field $\textit{F}$ is determined both by vertical and lateral electric fields induced by $\textit{V}$$_{\mathrm{GS}}$ and drain voltage ($\textit{V}$$_{\mathrm{DS}}$), Eq.(9) can be expressed as a function of terminal voltages as in Eq.(10):

$$ \begin{aligned} J\left(V_{\mathrm{GS}}, V_{\mathrm{DS}}\right)=& a \cdot \frac{q^{3} \cdot F\left(V_{\mathrm{GS}}, V_{\mathrm{DS}}\right) \sqrt{2 m_{r}}}{4 \pi^{2} \hbar^{2} \sqrt{E_{g}}} \cdot f \cdot V_{A}\left(V_{\mathrm{GS}}\right) \\ & \times \exp \left(-b \cdot \frac{4 \sqrt{2 m_{\mathrm{r}} E_{g}^{\frac{3}{2}}}}{3 q \hbar \cdot F\left(V_{\mathrm{GS}}, V_{\mathrm{DS}}\right)}\right) \end{aligned} $$

Here, $\textit{f}$ is an exponential function with a unity coefficient and $\textit{a}$ and $\textit{b}$ are constants. These additional correction factors are determined while performing the fitting of the output characteristics of the designed TFET, which will be clearly demonstrated in the following section.


1. Refinement of the Field-related Coefficients

2-D TCAD device simulations have been performed to investigate the electric field across the tunneling junction and its dependence on $\textit{V}$$_{\mathrm{GS}}$ and $\textit{V}$$_{\mathrm{DS}}$. Fig.3(a) shows the electric field at the source-channel junction as a function of location at different $\textit{V}$$_{\mathrm{GS}}$ values at $\textit{V}$$_{\mathrm{DS}}$ = 1 V. Fig.3(b) plots the maximum electric field $\textit{F}$ extracted from the results in Fig.3(a) as a function of $\textit{V}$$_{\mathrm{GS}}$ at $\textit{V}$$_{\mathrm{DS}}$ = 1 V. In the physical sense, it is presumed that $\textit{F}$ can be formulated as a sum of three components as expressed in Eq.(11).

$$ F=F_{0}+F_{V_{\mathrm{GS}}}+F_{V_{\mathrm{DS}}} $$

Here, $\textit{F}$$_{0}$ is the built-in electric field across the tunneling junction defined as the electric field induced by the built-in potential at zero bias. $\textit{F}$$_{\mathrm{VGS}}$ and $\textit{F}$$_{\mathrm{VDS}}$ are the electric fields induced when gate and drain biases are imposed. It should be noted that $\textit{F}$$_{\mathrm{VGS}}$ and $\textit{F}$$_{\mathrm{VDS}}$ have been schemed to be functions of both $\textit{V}$$_{\mathrm{GS}}$ and $\textit{V}$$_{\mathrm{DS}}$ at the same time in this work. Based on the device simulation results, it is found that $\textit{F}$$_{\mathrm{VGS}}$ can be expressed by Eq.(12) and supplemented by Eqs.(13) and (14). The coefficients employed in the following refinement procedures are tabularized as below.

Fig. 3. Electric fields. (a) Electric fields as a function of location at the source-channel junction at different $\textit{V}$$_{\mathrm{GS}}$ values ($\textit{V}$$_{\mathrm{DS}}$ = 1~V). (b) Maximum electric fields as a function of $\textit{V}$$_{\mathrm{GS}}$ at different $\textit{V}$$_{\mathrm{DS}}$’.


$$ F_{V_{\mathrm{GS}}}=F_{V_{\mathrm{GS}}}\left(V_{\mathrm{GS}}, V_{\mathrm{DS}}\right)=A_{0}\left(V_{\mathrm{DS}}\right) \cdot V_{\mathrm{GS}}+A_{1}\left(V_{\mathrm{DS}}\right) $$

$$ A_{0}\left(V_{\mathrm{DS}}\right)=\left(-3.41 \times 10^{5}\right) \exp \left(-\frac{V_{\mathrm{DS}}}{0.21}\right)+\left(2.82 \times 10^{6}\right) $$

$$ \begin{aligned} A_{1}\left(V_{\mathrm{DS}}\right)=&\left(1.03 \times 10^{5}\right) \exp \left(-\frac{V_{\mathrm{DS}}}{0.42}\right) \\ &+\left(3.2829 \times 10^{4}\right) V_{\mathrm{DS}}+\left(2.14 \times 10^{3}\right) \end{aligned} $$

Table 1. Coefficient functions for refining the electric field.

























The coefficient functions $\textit{A}$$_{0}$ and $\textit{A}$$_{1}$ are dependent on $\textit{V}$$_{\mathrm{DS}}$ solely as shown in Table 1 and it is explicit that $\textit{F}$$_{\mathrm{VGS}}$ is a linear function of $\textit{V}$$_{\mathrm{GS}}$ under a given $\textit{V}$$_{\mathrm{DS}}$ condition.

Fig. 4. Electric fields. (a) Electric fields as a function of location at the source-channel junction at different $\textit{V}$$_{\mathrm{DS}}$ values ($\textit{V}$$_{\mathrm{GS}}$ = 1~V). (b) Maximum electric fields as a function of $\textit{V}$$_{\mathrm{DS}}$ at different $\textit{V}$$_{\mathrm{GS}}$’.


$\textit{F}$$_{\mathrm{VDS}}$ is the $\textit{V}$$_{\mathrm{DS}}$-induced increment in $\textit{F}$ and it is shown that $\textit{F}$$_{\mathrm{VDS}}$ increases monotonically as $\textit{V}$$_{\mathrm{DS}}$ increases and is saturated eventually as demonstrated in Figs.4(a) and (b) obtained by the device simulation results. The overall change in $\textit{F}$ by $\textit{V}$$_{\mathrm{DS}}$ is much smaller than that by $\textit{V}$$_{\mathrm{GS}}$ (Fig.3(b)) since most of the incremental $\textit{V}$$_{\mathrm{DS}}$ voltage drop takes place across the relatively low-doped channel region and there is little change in $\textit{F}$ at the source-channel junction.

$$ F_{V_{\mathrm{DS}}}=B_{0}\left(V_{\mathrm{GS}}\right) \cdot \exp \left[-\frac{V_{\mathrm{DS}}}{T\left(V_{\mathrm{GS}}\right)}\right]+B_{1}\left(V_{\mathrm{GS}}\right) $$

$$ B_{0}\left(V_{\mathrm{GS}}\right)=\left(-3.64 \times 10^{4}\right) \exp \left(\frac{V_{\mathrm{GS}}}{0.43}\right)+\left(5.31 \times 10^{4}\right) $$

Fig. 5. $\textit{V}$$_{\mathrm{a}}$ as a function of $\textit{V}$$_{\mathrm{GS}}$ at different ${\gamma}$$_{0}$’s.


$$ B_{1}\left(V_{\mathrm{GS}}\right)=\left(3.84 \times 10^{4}\right) \exp \left(\frac{V_{\mathrm{GS}}}{0.43}\right)-\left(5.42 \times 10^{4}\right) $$

$$ T_{0}\left(V_{\mathrm{GS}}\right)=0.12 \exp \left(\frac{V_{\mathrm{GS}}}{0.96}\right)-0.07 $$

2. Correction of the Transfer Characteristics

$\textit{V}$$_{\mathrm{a}}$ is the applied voltage across the tunneling junction. It is known that the band-tail effect causes $\textit{V}$$_{\mathrm{a}}$ to increase exponentially as $\textit{V}$$_{\mathrm{GS}}$ increases [23,24]. Although the band-tail effects belong to non/low-crystalline materials, they can be considered even in the crystalline one when the material is doped and the energy bandgap narrowing takes place by the expansion of the allowed band having the newly introduced energy states with asymptotical reduction in number. The coefficients used for better description of the relation between $\textit{V}$$_{\mathrm{a}}$ and $\textit{V}$$_{\mathrm{GS}}$ are summarized in Table 2. Based on this idea, $\textit{V}$$_{\mathrm{a}}$ can be modeled as a function of $\textit{V}$$_{\mathrm{GS}}$ as expressed in Eqs.(19) and (20)[25]:

$$ V_{a}=U \exp \left(\frac{V_{\mathrm{GS}}-V_{\mathrm{th}}}{U}\right) $$

$$ U=\gamma_{0} U_{0}+\left(1-\gamma_{0}\right) U_{0} \cdot\left(\frac{V_{\mathrm{GS}}-\gamma_{1}}{V_{\mathrm{th}}-\gamma_{1}}\right) $$

Here, ${\gamma}$$_{0}$ determines the slope of the transfer curve in the subthreshold region. As ${\gamma}$$_{0}$ increases, the slope gets steeper. Fig.5depicts $\textit{V}$$_{\mathrm{a}}$ as a function of $\textit{V}$$_{\mathrm{GS}}$ at different ${\gamma}$$_{0}$ values, where other coefficients are arbitrarily plugged for simple identification of $\textit{V}$$_{\mathrm{a}}$ dependence on $\textit{V}$$_{\mathrm{GS}}$, ${\gamma}$$_{0}$, and ${\gamma}$$_{1}$.

Table 2. Coefficient functions for more accurately identifying the relation between voltages on gate and across the junction






Threshold voltage




Weighted potential




Base potential











Fig. 6. Correction function $\textit{f}$ as a function of $\textit{V}$$_{\mathrm{DS}}$ (a) at different $\textit{k}$ values and (b) at different $\textit{x}$$_{\mathrm{c}}$ values.


3. Correction of the Output Characteristics

The output characteristics of a TFET are determined by the Fermi-Dirac distribution of the filled states in the source junction and the empty states in the channel largely, being calculated by the density of states [26]. However, the existing mathematical equation describing the output characteristics does not show a good agreement in the high $\textit{V}$$_{\mathrm{DS}}$ region where the drain current ($\textit{I}$$_{\mathrm{D}}$) is saturated [26].

Table 3. Coefficient functions for more accurate description of the output characteristics of the TFET device






Curvature function


(of $V_{GS}$ and $V_{DS}$)



Steepness coefficient


(of $V_{GS}$)



Voltage Shift


(of $V_{GS}$)


For higher accuracy in Eq.(10), with the consideration of number of states contributing to the tunneling rate, $\textit{f}$ can be further adjusted as a function of $\textit{V}$$_{\mathrm{DS}}$ and $\textit{V}$$_{\mathrm{GS}}$ as shown in Eq.(21) through (23).

$$ f=\exp \left[-\exp \left[-k\left(V_{\mathrm{DS}}-x_{c}\right)\right]\right] $$

$$ k=58.2 \exp \left(-\frac{V_{\mathrm{GS}}}{0.23}\right)+5.66 $$

$$ x_{c}=0.31 \exp \left(\frac{V_{\mathrm{cs}}}{1.29}\right)-0.33 $$

The properties of the coefficients employed in Eq.(21) through (23)are summarized in Table 3. $\textit{f}$ is a hyperlinear function that is introduced to more accurately describe the non-ohmic current conduction in the triode region, the steepness in current increase, and the current saturation in the high $\textit{V}$$_{\mathrm{DS}}$ region. $\textit{f}$ in Eq.(21) is more specifically determined by coefficients $\textit{k}$ in Eq.(22) and $\textit{x}$$_{\mathrm{c}}$ in Eq.(23) which reflect the dependence on $\textit{V}$$_{\mathrm{GS}}$. The correction function $\textit{f}$ as a function of $\textit{V}$$_{\mathrm{DS}}$ at different $\textit{k}$ values and different $\textit{x}$$_{\mathrm{c}}$ values are depicted in Figs.6(a) and (b), respectively.

4. Ambipolar Current Modeling

When $\textit{V}$$_{\mathrm{GS}}$ has an excessively large negative value, $\textit{I}$$_{\mathrm{D}}$ begins to increase again due to the band-to-band tunneling of valence electrons in the channel into the conduction band of the drain junction. If the doping concentrations in the channel and drain junction are properly adjusted, the ambipolar current can be effectively suppressed. However, it is not possible to completely avoid the unwanted leakage current in case that $\textit{V}$$_{\mathrm{GS}}$ is too much low [27,28], and the maximum $\textit{V}$$_{\mathrm{GS}}$ window where the band-to-band tunneling is prohibited corresponds to the energy bandgap of the channel material theoretically. This current in TFET is referred as ambipolar current and is neglected in many cases although its presence is not perfectly avoidable. Thus, it would be a more accurate compact model of a TFET if the ambipolar current is considered and the final model is utilized in the circuit level simulation with higher accuracy and reality. Since the underlying mechanism for the ambipolar current is same with that for the on-state current, an equation for the band-to-band tunneling can be employed again in the compact model equation [29]. On the other hand, unlike the current driving condition, the lateral electric field tends to linearly increase with $\textit{V}$$_{\mathrm{DS}}$. The effective tunneling width between source and channel, under the on-state bias condition, is mainly determined by $\textit{V}$$_{\mathrm{GS}}$ with little effect by $\textit{V}$$_{\mathrm{DS}}$. However, ambipolar current takes place neat the channel-drain junction so that $\textit{V}$$_{\mathrm{DS}}$ has an increased effect on the ambipolar current even at a given $\textit{V}$$_{\mathrm{GS}}$. $\textit{V}$$_{\mathrm{a}}$ and $\textit{U}$ can be modified to reflect the ambipolar current characteristics in the negative $\textit{V}$$_{\mathrm{GS}}$ region as shown in Eq. (24,25) below:

$$ V_{\mathrm{a}}=U \exp \left[-\frac{V_{\mathrm{GS}}-V_{\mathrm{th}}-\left(V_{\mathrm{DS}}-V_{\mathrm{DD}}\right)}{U}\right] $$

$$ U=\gamma_{0} U_{0}+\left(1-\gamma_{0}\right) U_{0} \cdot\left[-\frac{V_{\mathrm{GS}}-\gamma_{1}-\left(V_{\mathrm{DS}}-V_{\mathrm{DD}}\right)}{V_{\mathrm{th}}-\gamma_{1}}\right] $$

As $\textit{V}$$_{\mathrm{GS}}$ goes to negative with larger magnitude, $\textit{I}$$_{\mathrm{D}}$ increases. As can be confirmed by Eqs.(24) and (25), ($\textit{V}$$_{\mathrm{DS}}$ - $\textit{V}$$_{\mathrm{DD}}$) has been newly introduced in order to reflect the leftward transfer curve shift (only for the negative $\textit{V}$$_{\mathrm{GS}}$ part) with a smaller positive $\textit{V}$$_{\mathrm{DS}}$. When $\textit{V}$$_{\mathrm{DS}}$ is smaller than $\textit{V}$$_{\mathrm{DD}}$, the ambipolar current on-set $\textit{V}$$_{\mathrm{GS}}$ is shifted to the left by the amount of $\textit{V}$$_{\mathrm{DD}}$ - $\textit{V}$$_{\mathrm{DS}}$ from the original on-set $\textit{V}$$_{\mathrm{GS}}$ at $\textit{V}$$_{\mathrm{DS}}$ = $\textit{V}$$_{\mathrm{DD}}$. In the negative $\textit{V}$$_{\mathrm{GS}}$ region where the ambipolar current becomes prominent, the incremental electric field induced by $\textit{V}$$_{\mathrm{GS}}$ can be formulated with the same equation in Eq.(12) and the coefficient functions need to be corrected to Eqs.(26) and (27)as below:

$$ A_{0}\left(V_{\mathrm{DS}}\right)=\left(-5.58 \times 10^{5}\right) \exp \left(-\frac{V_{\mathrm{DS}}}{0.58}\right)-\left(9.46 \times 10^{5}\right) $$

$$ A_{1}\left(V_{\mathrm{DS}}\right)=\left(1.05 \times 10^{5}\right) \exp \left(\frac{-V_{\mathrm{DS}}}{0.27}\right)+\left(1.60 \times 10^{4}\right) $$

Fig. 7. DC characteristics obtained by TCAD device simulation and modeling results. (a) Transfer and (b) output characteristics.


Also, the incremental electric field induced by $\textit{V}$$_{\mathrm{DS}}$ and the associated coefficient functions can be expressed in the forms in Eq.(28) through (30) as below:

$$ F_{V_{\mathrm{DS}}}=B_{0}\left(V_{\mathrm{GS}}\right) \cdot V_{\mathrm{DS}}+B_{1}\left(V_{\mathrm{GS}}\right) $$

$$ B_{0}\left(V_{\mathrm{GS}}\right)=\left(5.58 \times 10^{5}\right) \exp \left(\frac{V_{\mathrm{GS}}}{0.58}\right)+\left(9.39 \times 10^{5}\right) $$

$$ B_{1}\left(V_{\mathrm{GS}}\right)=\left(1.05 \times 10^{5}\right) \exp \left(\frac{V_{\mathrm{GS}}}{0.27}\right)+\left(1.68 \times 10^{4}\right) $$

The current density as a function of both $\textit{V}$$_{\mathrm{GS}}$ and $\textit{V}$$_{\mathrm{DS}}$ can be expressed back in the same form in Eq.(10).


Fig. 8. Transfer characteristics obtained in the HSPICE simulation with the developed TFET compact model having higher completeness with the ambipolar current modeling results.


Figs.7(a) and (b) demonstrate the transfer and the output curves of the designed TFET, in comparison between the results from the TCAD device simulation and the modeling.

The reference in comparison has been obtained by the TCAD device simulation results from the TFET device based on the SOI platform. The modeling results in Figs.7(a) and (b) have been obtained by the SPICE simulation. For obtaining the circuit simulation results, the compact models have been prepared first by coding the corrected mathematical equations and functions in III. 1 through 3 by Verilog-A, and then, transferred into HSPICE [30,31]. The curves plotted in Figs.7(a) and (b) are the results after performing the correction in $\textit{f}$ as a function of $\textit{V}$$_{\mathrm{GS}}$ and $\textit{V}$$_{\mathrm{DS}}$.

Fig.8shows the transfer curves of the TFET obtained from the HSPICE simulation results, at $\textit{V}$$_{\mathrm{DS}}$ = 0.9 V and 1 V. $\textit{V}$$_{\mathrm{DD}}$ in Eqs.(24) and (25) is assumed to be 1 V and it is confirmed by the figure that the transfer curve in the negative $\textit{V}$$_{\mathrm{GS}}$ region is shifted leftward for smaller positive $\textit{V}$$_{\mathrm{DS}}$ as can be predicted by Eqs.(24) and (25). In the HSPICE simulation, the off-state current has been set to a constant, 1.65${\times}$10$^{-16}$ A/μm, which is transplanted from the TCAD device simulation results. It has been successfully demonstrated that the developed TFET compact model provides a good agreement between the current characteristics by TCAD device simulation and HSPICE circuit simulation results: ambipolar and on-state currents in the transfer curves and the on-set voltages and saturation currents in the output curves under various bias conditions.


In this work, a more accurate DC compact model for an SOI TFET has been developed. The master equation has been more refined with coefficient functions of higher accuracy. Verilog-A coding and running the compact model at an HSPICE have confirmed the high accuracy of the developed model in comparison with the raw data, the TCAD physical device simulation results. The accuracies have been found in both transfer and output characteristics. In particular, the ambipolar current characteristics have been considered in this work for higher practicability and reality in more complicated circuit designs where even a tiny amount of power consumption should be considered.


This work was supported by the National Research Foundation of Korea (NRF) funded by the Korean Ministry of Science and ICT (MSIT) through a Mid- Career Researcher Program (NRF-2017R1A2B2011570) and also supported by the Gachon University Research Fund of 2019 (GCU-2019-0324).


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Seoyeon Go

Seoyeon Go received the B.S. in electronics engineering from Gachon University, Seongnam, Korea, in 2019, and had been pursuing the M.S. degree.

Her research interests include optimal design of device CMOS devices for high-speed low-power applications, device-circuit mixed-mode simulation, compact modeling of novel devices for circuit design by HSPICE.

She is a Student Member of IEIE.

Won Jae Lee

Won Jae Lee received the B.S. degree in electrical engineering and the M.S. degree in electrical material engineering from Kwangwoon University, Seoul, Korea, in 1980 and 1982, respectively, and received the Ph.D. degree in electrical engineering from Hongik University, Seoul, Korea, in 1988.

He worked as a Postdoctoral Researcher at Tokyo Institute of Technology (TIT), Japan, from 1993 to 1994.

Also, he worked as an Exchange Researcher at Northwestern University, IL, USA, in 2009. Currently, he is a Professor at the Department of Electronics Engineering, Gachon University, Korea.

His research interests include photovoltaic device, organic light-emitting diode (OLED), and organic thin-film transistor (OTFT).

Seongjae Cho

Seongjae Cho received the B.S. and the Ph.D. degrees in electrical engineering from Seoul National University, Seoul, Korea, in 2004 and 2010, respectively.

He worked as an Exchange Researcher at the National Institute of Advanced Industrial Science and Technology (AIST) in Tsukuba, Japan, in 2009.

Also, he worked as a Postdotoral Researcher at Seoul National University in 2010 and at Stanford University, CA, USA, from 2010 to 2013.

Currently, he is working as an Associate Professor at the Department of Electronics Engineering, Gachon University, Korea.

His research interests include emerging memory technologies, nanoscale CMOS devices, group-IV optical devices, and hardware-driven neuromorphic devices and systems.

He is a Life Member of the IEIE.