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“JSTS has been indexed and abstracted in the SCIE (Science Citation Index Expanded) since Volume 9, Issue 1 in 2009. Furthermore, it continues to maintain its listing in the SCOPUS database and is recognized as a regular journal by the Korea Research Foundation.

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References

1 
Frans, Y., Carey, D., Erett, M. et al: ‘A 0.5-16.3 Gb/s Fully Adaptive Flexible-Reach Transceiver for FPGA in 20 nm CMOS’ , IEEE Jornal of Solid-State Circuits, 2015, 50, 8, pp. 1932-1944, doi:10.1109/JSSC.2015.2413849.DOI
2 
Abdollahi, R., Hadidi, K. and Khoei, A.: ‘A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits’,IEEE Transactions on Circuits and Systems I: Regular Paper 2016, 63, 10, pp. 1682-1689, doi:10.1109/TCSI.2016.2582239.DOI
3 
Savoj, J., Hsieh, K.C.H., An, F.T. et al: ‘A Low-Power 0.5-6.6Gb/s Wireline Transceiver Embedded in Low-Cost 28nm FPGAs’, IEEE Journal of Solid-State Circuits, 2013, 48, 11, pp. 2582-2594, doi:10.1109/JSSC.2013.2274824.DOI
4 
Faust, A.C., Narasimha, R.L., Bhatia, K. et al: ‘FEC-based 4 Gb/s backplane transceiver in 90nm CMOS’, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, San Jose, CA, USA, 9-12 Sept. 2012, doi:10.1109/CICC.2012.6330665.DOI