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References

1 
Lin, C.-Y., Hung, Y.-T., & Lin, T.-H, “A 2.4-GHz 500-uW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS,” in IEEE Asian Solid-State Circuit Conf. (ASSCC), pp. 91-94, Nov. 2019.DOI
2 
Jin, Xuefan, et al, “A 4-GHz Sub-hamonically Injection-Locked Phase-Locked Loop with Self-Calibrated Injectioin Timing and Pulsewidth,” in IEEE Asian Solid-State Circuit Conf. (ASSCC), pp. 83-96, Nov. 2019.DOI
3 
Y.-H. Tseng, C.-W. Yeh, and S.-I. Liu, “A 2.25-2.7 GHz Area-Efficient Subharmonically Injection-Locked Fractional-N Frequency Synthesizer With a Fast-Converging Correlation Loop,” IEEE Trans. Circuits Syst. Ⅰ, Reg. Papers, vol. 64, no. 4, pp. 811-822, Apr. 2017.DOI
4 
Zhang, Zhao, et al, “A 18-to-23 GHz -253.5dB-FoM Sub-Harmonically Injection-Locked ADPLL with ILFD Aided Adaptvie Injection Timing Alignment Technique,” in IEEE Asian Solid-State Circuit Conf. (ASSCC), pp. 249-252, Nov. 2017.URL
5 
M.-S. Choo, et al, “A PVT Variation-Robust All-Digital Injection-Locked Clock Multiplier With Real-Time Offset Tracking Using Time-Division Dual Calibration,” IEEE J. Solid-State Circuits, vol. 56, no. 8, pp. 2525-2538, Aug. 2021.DOI