Zargari M., Terrovitis M., Jen S. H. -M., Kaczynski B. J., MeeLan Lee , Mack M. P., Mehta S. S., Mendis S., Onodera K., Samavati H., Si W. W., Singh K., Tabatabaei A., Weber D., Su D. K., Wooley B. A., Dec 2004, A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g wireless LAN, IEEE J. Solid-State Circuits, Vol. 39, No. 12, pp. 2239-2249

Maeda T., Matsuno N., Hori S., Yamase T., Tokairin T., Yanagisawa K., Yano H., Walkington R., Numata K., Yoshida N., Takahashi Y., Hida H., Nov 2006, A low-power dual-band triple-mode WLAN CMOS transceiver, IEEE J. Solid-State Circuits, Vol. 41, No. 11, pp. 2481-2490

Gross S., Maimon T., Cossoy F., Ruberto M., Normatov G., Rivkind A., Telzhensky N., Banin R., Ashckenazi O., Ben-Bassat A., Zaguri S., Hara G., Zajac M., shahar N., Shahaf S., Yousef H., Mor E., Eliat Y., Nazimov A., Beer Z., Fridman A., Degani O., Anaheim, Dual-band CMOS transceiver with highly integrated front-end for 450Mb/s 802.11 n systems, in Proc. IEEE RFIC

Yi X., Yang K., Liang Z., Liu B., Devrishi K., Boon C.C., Li C., Feng G., Regev D., Shilo S., Meng F., Liu H., Sun J., Hu G., Miao Y., San Francisco, A 65nm CMOS carrier-aggregation transceiver for IEEE 802.11 WLAN applications, in Proc. IEEE RFIC

Hwu S., Razavi B., April 2006, An RF receiver for intra-band carrier aggregation, IEEE J. Solid-State Circuits, Vol. 50, No. 4, pp. 946-961

Kargaran E., Madadi B., June. 2010, Design of a novel dual-band concurrent CMOS LNA with current reuse topology, in Proc. IEEE ICNIT, Manila, Philippines, pp. 386-388

Neihart N., Brown J., Yu X., Aug. 2012, A dual-band 2.45/6 GHz CMOS LNA utilizing a dual-resonant transformer-based matching network, IEEE Trans. Circuits Syst. I, Reg. Papers, Vol. 59, No. 8, pp. 1743-1751

H Y., Wang S., Chen P., Hwang Y., Chen J., May. 2015, A concurrent dual-band 2.4/5.2 GHz low-noise amplifier using gain enhanced techniques, in Proc. IEEE APEMC, Taipei, Taiwan, Vol. taipei, No. taiwan, pp. 231-234

Sattar S., Zulkifli T., Sept 2017, A 2.4/5.2-GHz Concurrent Dual-Band CMOS Low Noise Amplifier, IEEE Access, Vol. 5, pp. 21148-21156

Im D., Exp Briefs, A +9-dBm output P1 dB active feedback CMOS wideband LNA for SAW-less receivers, IEEE Trans. Circuits Syst. II

Nguyen T., Kim C., Ihm G., July 2006, CMOS low-noise amplifier design optimization techniques, IEEE Trans. Microw. Theory Techn., Vol. 54, No. 7, pp. 3155-3156

Asgaran S., Deen M., Chen C., Rezvani G., Kamali Y., Kiyota Y., May 2007, Analytical Determination of MOSFET's High-Frequency Noise Parameters From NF$_{50}$ Measurements and Its Application in RFIC Design, IEEE J. Solid-State Circuits, Vol. 42, No. 5, pp. 1034-1043

Taibi A., Slimane A., Belaroussi M. T., Tedjini S. A., Trabelsi M., Dec 2013, Low power and high linear reconfigurable CMOS LNA for multi-standard wireless applications, in Proc. IEEE ICM, Beirut, Lebanon