I. INTRODUCTION

The current mirror is a fundamental design block in analog integrated circuits, providing both supply and reference currents to each design block. The cascode current mirror is widely used due to its larger output resistance and greater mirroring accuracy compared to the single-ended current mirror ^[1]. To reduce the voltage headroom in low-supply voltage, wide voltage swing operation is required for the cascode current mirror ^[2]. Moreover, wide dynamic-range operation is crucial for applications where the reference current varies over a wide range ^[3]. For instance, current sensing in switching power converters ^[4,5] necessitates a wide dynamic-range current mirror. Fig. 1 shows the high-side (HS) and low-side (LS) current sensing circuits in a switching power converter. The current sensing circuit is followed by the current mirror to utilize the sensed current information. Since the inductor current can be varied by the output load ($R_{L}$), inductance (${L}$), switching frequency, and duty-cycle, the following current mirror has to operate at a wide dynamic-range. In particular, when the switching power converter operates in the discontinuous conduction mode (DCM), the inductor current may drop to 0 A. Therefore, the current mirror has to be designed to cover the current levels ranging from 0 A to the maximum current rating of the inductor.

Fig. 1. High-side and low-side current sensing circuits in the switching power converter.

In this paper, a wide-swing self-biased cascode current mirror designed for wide dynamic-range applications is described. Unlike conventional cascode current mirrors, the proposed structure is compact and demonstrates high accuracy across a wide dynamic-range while maintaining a wide voltage swing at the output.

This paper is organized as follows. Section II introduces the conventional cascode current mirrors. Section III describes the proposed wide-swing cascode current mirror and Section IV provides the circuit implementation and measurement results, followed by the conclusion in Section V.

II. CONVENTIONAL CASCODE CURRENT MIRRORS

Fig. 2 shows the different types of conventional wide-swing cascode current mirrors. The cascode current mirror consists of four transistors $M_{N1}$, $M_{N2}$, $M_{N3}$, and $M_{N4}$. A wide voltage swing can be achieved by connecting the gate of $M_{N1}$ and $M_{N2}$ ($V_{G1}$) to the drain of $M_{N3}$, and properly biasing the gate of $M_{N3}$ and $M_{N4}$ ($V_{G2}$). Assuming that the same sized NMOS transistors are used for $M_{N1}$, $M_{N2}$, $M_{N3}$, and $M_{N4}$ in implementing the cascode current mirror and ignoring the body effect, $V_{G2}$ should be biased as follows ^[6]:

where $V_{T}$ and $V_{OV}$ are the threshold and overdrive voltage of the NMOS used in the current mirror, respectively.

The $V_{G2}$ can be biased with an extra current path as shown in Fig. 2(b). In addition to the reference current path, the extra current path is added and bias the $V_{G2}$ to $V_{T} +2V_{OV}$ by setting the overdrive voltage of $M_{NB1}$ to $2V_{OV}$. Although, this structure can achieve wide-swing and wide dynamic-range operation, it is not preferable to use in the current mirrors of CM1 and CM3 in Fig. 1, because the extra current path requires an additional current sensing circuit. Therefore, the self-biased current mirror structure is necessary here.

The wide-swing self-biased cascode structure can be implemented using a resistor ($R_{B}$) or an isolated-active device ($M_{PB1}$) ^[7] as shown in Figs. 2(c) and 2(d), respectively. The $V_{G2}$ can be self-biased by choosing the $R_{B}$ value to set the voltage drop across the $R_{B}$ to $V_{OV}$ [Fig. 2(c)]. However, self-biasing with a resistor is not suitable for the wide dynamic-range applications because the voltage drop across the resistor is proportional to the reference current ($I_{REF}$), while $V_{OV}$ is proportional to the $\sqrt{I_{REF}}$. To resolve this issue, the isolated-active device ($M_{PB1}$) can be used as shown in Fig. 2 (d) ^[7]. Assuming the threshold voltage of PMOS and NMOS are nearly identical, $V_{G2}$ can be set to $V_{T}+2V_{OV}$ by setting the $V_{OV}$ of $M_{PB1}$ to the same value as the $V_{OV}$ of $M_{N3}$. Therefore, the $\Delta V_{G2}$ is proportional to $\sqrt{I_{REF}}$ allowing $V_{G2}$ to track $V_{T} +2V_{OV}$ across a wide range of the reference currents. However, this approach requires the isolated MOSFET to use as an active-device, which increases the die size. In addition, it cannot be used for P-type current mirror if the deep N-well process is not supported which is essential for using an isolated NMOS transistor.

III. PROPOSED WIDE-SWING CASCODE CURRENT MIRROR

Fig. 3 shows the proposed wide-swing self-biased cascode current mirror, which employs the non-isolated active-device. A P-type active-device is used for the NMOS current mirror [Fig. 3(a)], with its gate connected to GND, and an N-type active-device is used for the PMOS current mirror [Fig. 3(b)], with its gate connected to the supply-voltage ($V_{DD}$). In the proposed structure, $V_{G2}$ is determined by the $V_{SG}$ of $M_{PB2}$, however, the body effect has to be considered since a non-isolated active-device is used. Therefore, $V_{G2}$ in Fig. 3(a) can be expressed as follows:

where $V_{T0}$ is the threshold voltage without the body effect, ${\Delta} V_{T2}$ is the amount of threshold voltage varies caused by the body effect. $\Delta V_{T,PB2}$ also can be expressed as follows:

where $\gamma$, ${\phi }_F$, and $V_{SB}$ are the body effect coefficient, the fermi potential of the substrate, and the body-to-source voltage, respectively. Since the $|V_{SB,PB2}|$ is increased by $\sqrt{I_{REF}}$, ${\Delta} V_{T,PB2}$ is inverse proportional to $\sqrt[4]{I_{REF}}$. Therefore, ${\Delta} V_{G2}$ is proportional to $\sqrt{I_{REF}}$ by $V_{OV, PB2}$ term and inverse proportional to $\sqrt[4]{I_{REF}}$ by the body effect.

When considering a wide-range of $I_{REF}$, the body effect becomes less effective at high $I_{REF}$, and $V_{G2}$ can be approximated as $V_{T0,PB2} + V_{OV,PB2}$. Assuming that the threshold voltage of PMOS and NMOS are nearly the same, $V_{OV,PB2}$ is set to $V_{OV, N1} + V _{OV,N2}$ by appropriately sizing $M_{PB2}$ to achieve wide-swing operation. On the other hand, at low $I_{REF}$, $V_{OV,PB2}$ is almost negligible, and $V_{G2}$ can be approximately as $V_{T0,PB2} + \Delta V_{T,PB2}$, whereas $V_{G2}$ is $V_{T0,PB1}$ in the conventional approaches [Figs. 2(b) and 2(d)]. Thus, the proposed approach shows a higher $V_{G2}$ due to the body effect of the biasing device ($M_{PB2}$), which is beneficial in reducing current mirror mismatch at low $I_{REF}$. In conventional current mirrors, the $V_{DS}$ of $M_{N1}$ and $M_{N2}$ decreases to a small value at low $I_{REF}$, and even a small mismatch of $V_{DS}$ between $M_{N1}$ and $M_{N2}$ can lead to significant current mirror mismatch. By applying a higher $V_{DS}$ of $M_{N1}$ and $M_{N2}$ in the proposed approach, the channel length modulation can be suppressed, and current mirror mismatch can be reduced. Therefore, a wider range of $I_{REF}$ with lower current mirror mismatch can be achieved in the proposed structure. The design procedure is very simple, requiring the sizing of $M_{PB2}$ to satisfy Eq. (2) to meet Eq. (1) at the highest $I_{REF}$. This ensures that the current mirror maintains high accuracy over a wide-range of $I_{REF}$.

Fig. 3. Proposed wide-swing self-biased cascode current mirrors. (a) NMOS current mirror self-biased by the P-type active-device. (b) PMOS current mirror self-biased by the N-type active-device.

(a) (b)

IV. CIRCUIT IMPLEMENTATION AND MEASUREMENT RESULTS

The proposed wide-swing self-biased current mirror has been implemented in 0.18 $\mu$m CMOS process. Fig. 4 shows the schematic of the implemented self-biased current mirror along with its parameters. To ensure a fair comparison among different bias devices, a single cascode current mirror ($M_{P1} -M _{P4}$) is utilized, and different bias devices can be selected by S[2:0]. As a result, the current mirror can be tested with the proposed bias device ($M_{NB2}$) as well as conventional bias devices ($R_{B}$ and $M_{NB1}$). In addition, by employing the same mirrored circuit ($M_{P1} -M_{P4}$), the performance mismatch caused by process variation can be avoided.

For wide dynamic-range applications, the wide-swing operation has to be achieved at the maximum $I_{REF}$, ensuring that the voltage swing is not limited through the entire range of $I_{REF}$. Therefore, the bias devices ($R_{B}$, $M_{NB1}$, and $M_{NB2}$) are sized appropriately that $V_{G2}$ is set to almost the same level at the maximum $I_{REF}$, ensuring a consistent maximum voltage swing performance. Once the highest voltage swing is set at the maximum $I_{REF}$, the dynamic-range of $I_{REF}$ can be fairly compared by decreasing its level.

Fig. 5 depicts the chip photograph, and layout. The sizes of $R_{B}$, $M_{NB1}$, and $M_{NB2}$ are 40 $\mu$m${}^{2}$, 557 $\mu$m${}^{2}$, and 28 $\mu$m${}^{2}$, respectively. The $M_{NB1}$ occupies a relatively large area due to its requirement for an isolated device, which utilizes a deep N-well process to isolate the body of $M_{NB1}$ from the P-substrate. The supply voltage of 1.8 V is applied, and $V_{OUT}$ is set to 0.5 V. The $I_{REF}$ is varied from 30 nA to 40 $\mu$A, and the mismatch of current mirror is shown in Fig. 6. At low $I_{REF}$, the mismatch of the current mirror biased by the resistor structure is degraded because the voltage drop across the resistor is proportional to the $I_{REF}$, which is not suitable for the wide dynamic-range operation. The mismatch results for both the biased by the isolated and non-isolated active devices are similar. Fig. 7 shows the measured current mirror mismatch at different temperature with the $I_{REF}$ of 100nA. The current mirror biased by the resistor shows significant mismatch variation compared to the active device biasing methods due to the difference in temperature coefficient between the resistor and the threshold voltage of the transistors.

Fig. 6. Measured current mirror mismatch at different $I_{REF}$.

Fig. 7. Measured current mirror mismatch at different temperature with $I_{REF}$ of 100 nA.

Table 1 summarizes the performance and provides a comparison with other biasing structure. The proposed structure can achieve $\times 333$ wider dynamic-range compared to the resistor based biasing structure. Furthermore, it is a compact design that can achieve wide dynamic-range without the requirement for an isolated active device. The area of the bias device is reduced by approximately 20 times compared to prior work ^[7], while achieving a similar wide dynamic range.

V. CONCLUSIONS

A wide-swing self-biased cascode current mirror for wide dynamic-range is demonstrated. The proposed structure can achieve high accuracy and wide voltage swing over a wide range of $I_{REF}$ without requiring an extra current path or an isolated active device. The implemented current mirror was tested with different bias devices, showing better current mirror mismatch and $\times333$ wider dynamic-range compared to conventional resistor-based biasing structure. It is also a compact design that can be easily biased by a non-isolated active device.