I. INTRODUCTION

5 G FR2 utilizes mm-Wave bands to provide very high data-rate by extending the bandwidth. However, in a given antenna gain, the use of mm-wave bands leads to smaller effective area of antenna compared to that of sub-6 GHz frequency range, and results in reduced sensitivity or interpreted as increased path loss ^[1-3].

To overcome the small effective area of mm-wave antennas, phased array beamforming technology is adopted. The antenna space is typically designed around 0.5${\lambda}$ to obviate grating lobe, which corresponds to around 5 mm in 28 GHz. This means all the components should be mounted within 5 mm ${\times}$ 5 mm area assuming panel arrays. This size constraint leads to the requirement of components integration into a small chip area including additional functionality ^[4,5].

To exploit the 5G FR2, accurate output power control is required, and a power detector is one of the essential building blocks. Power detectors have been widely used in modern wireless communication systems and one of the main functional building blocks on the phased array TX path to detect and control the output power ^[6-8]. General features of the power detector are sensing the output power and converting the power levels to corresponding DC voltages. To obviate the size constraint, a power detector integrated on the PA is highly desirable.

Recently, there have been several reports on Ka-band PA with on chip power detector in CMOS technology ^[9-11]. But, the output power is limited due to the power limitation of CMOS technology. On the other hand, GaAs technologies have been widely used for the high-performance PA development in mm-Wave ^[12-20]. However, for Ka-band applications, it is hard to find papers on GaAs PA with on-chip power detector.

In this paper, a Ka-band power amplifier with on-chip power detector for 5G FR2 application is presented in a 0.15~${\mu}$m GaAs pHEMT technology. To evaluate the performance in surface mount use, the PA die chip is attached on a commercial open cavity QFN package, and the performances are evaluated including the package effects.

II. CIRCUIT DESIGN

Fig. 1 shows simplified schematic of the Ka-band PA in this work. The PA is designed as three stage cascades to enhance the power gain. Transmission lines and MIM capacitors are used for matching and bias circuits. The output stage, power stage, is composed of two Q$_{3}$ transistors.

TL$_{2}$ add up the currents from two Q$_{3}$ drains and combine the output power. The output matching is carried out mainly as two-sections with TL$_{2}$-C$_{1}$ and TL$_{3}$-C$_{2}$. To achieve more than 27 dBm output power, the size of each transistor Q$_{3}$ was selected as 8-finger 80-${\mu}$m to have more than 25 dBm output power. This leads to more than 27 dBm output power by adding up the powers from two Q$_{3}$ transistors considering insertion losses of the output matching network. The optimum impedance of each Q$_{3}$ is found as around 9.5-2.3j Ohm by load-pull simulation. The two-section matching network transforms 50 Ohm to the optimum impedance. DC power is supplied to Q$_{3}$ by TL$_{4}$ through TL$_{2}$ and TL$_{3}$. To drive the power stage, the PA input signal is amplified by gain stage composed of Q$_{1}$ (4-finger 70-${\mu}$m) and distributed into two paths by TL$_{1}$ to feed the gate of Q$_{2}$(4-finger 40-${\mu}$m), driver stage. Again, the drive signals from Q$_{2}$ drains are fed into the gate of Q$_{3}$, power stage. The input, driver, and power stages are biased with current 40 mA, 60 mA, and 160 mA respectively. Interstage matching between stages are carried out as conjugate gain matching.

The on-chip power detector is designed using the directional coupler CL to sample incident wave from PA to antenna. Fig. 2 shows the operation principle of the power detector with the directional coupler. Incident wave V$_{+}$ is coupled to coupling port P$_{3}$ with the coupling coefficient ${\alpha}$ which is lower than unity, and the coupled wave can be represented as ${\alpha}$V$_{+}$. The reflected wave V$_{-}$ from the load is coupled to isolation port P$_{4}$, and the coupled wave can be represented as ${\alpha}$V$_{\mathrm{-.}}$ The coupled wave ${\alpha}$V$_{+}$ is rectified by the rectifier composed of diode, capacitor, and resistor, which is a conventional envelope detector. The size of the diode is 1-finger 1-${\mu}$m. The output V$_{\mathrm{pd}}$ of the rectifier is a DC voltage proportional to the swing voltage of the coupled wave ${\alpha}$V$_{+}$ ,and can be used for the power detection. A termination resistor R$_{\mathrm{T}}$ in series with bypass capacitor is connected to the isolation port P$_{4}$ to absorb ${\alpha}$V$_{-}$ from reflected wave. The directional coupler samples only the incident wave V$_{+}$, which enables the detector insensitive to the load impedance variations. To minimize loading effect by the power detector, a low coupling coefficient ${\alpha}$ is desirable. However, a low coupling coefficient leads to a reduced sensitivity of the power detector. To enhance the sensitivity while maintaining low coupling coefficient, the diode in the rectifier is biased with V$_{\mathrm{bias}}$, 0.9 V. Fig. 3 shows the EM simulation result of the directional coupler. The coupling coefficient is around -20 dB, and the directivity is around 9 dB at 28 GHz. The insertion loss is less than -0.08 dB, which also means very close to 50~ohm matching. The low coupling coefficient and low insertion loss minimizes loading effect of the power detector. The impact on the detector accuracy with low directivity is accuracy degradation in an unmatched condition. Higher directivity can be obtained with around quarter wavelength directional coupler which is around 900 um at 28 GHz. In this work, the main design goal of the power detector was to reduce the size occupation and loading effect with reasonable detection accuracy.

Fig. 1. Simplified schematic of the Ka-band power amplifier.

Fig. 2. Operation principle of the power detector.

Fig. 3. Simulation result of the directional coupler.

III. MEASUREMENT RESULTS

The PA was fabricated using WINSEMI 0.15 ${\mu}$m E-mode pHEMT technology. Fig. 4 shows the microphotograph of the fabricated Ka-band PA. The chip size is 2.09 mm ${\times}$ 1.28 mm including pads. The PA die chip is attached on a commercial open cavity QFN package as in Fig. 5 to evaluate the performance in surface mount use. To enhance the thermal spreading from the die, a high thermal conductivity epoxy is used for the die attach. The performances are evaluated including the package effects while mounted on PCB. The die attached QFN package is sold on PCB, and the performances are measured by probing on PCB. To incorporate the bonding wire effect at the input port and the output port, an additional inductance around 0.35 nH was included in design stage assuming two or three bonding wires in parallel and assuming within 1 mm wire length.

4 V supply is applied to the PA drain while biased total 260 mA quiescent current. Fig. 6 shows the measured S-parameters. The small signal gain is over 22~dB from 26.6 GHz to 29.2 GHz. The input return loss is over 6 dB, and the output return loss is over 8 dB in the operation frequency. Comparing to the simulation results, S$_{21}$ is roughly similar to the measurements. S$_{11}$ and S$_{22}$ are quite deviated from the simulation, but still within an acceptable range. Fig. 7 shows the measured output power and power added efficiency in the operation frequency. The output P1dB is over 26.9 dBm, the saturated output power is over 27.4 dBm, and the maximum PAE is 25~30%. Fig. 8 shows the measured power detector output voltage on V$_{\mathrm{pd}}$ versus the PA output power. The power detector shows very coherent output voltage to the output power and the operation frequency. The voltage deviation increases with the output power, but still has a very good coherency up to the saturated output power. At 27.4 dBm output, the detector output voltage is 1.81~1.95 V from 26.6 GHz to 29.2 GHz. This corresponds to ${\pm}$ 3.7% variation across the operation frequency, which is still very coherent values regarding the wide operation frequencies. The deviation increasing with higher output is mainly due to the harmonic component variations with frequencies. Table 1 shows comparison with previously reported Ka-band power amplifiers in GaAs pHEMT technology. This work demonstrated comparable performances with on-chip power detector and QFN package.

Fig. 4. Chip photograph.

Fig. 5. Packaged PA on an open cavity QFN.

Fig. 6. Measured S-parameters.

Fig. 7. Measured output power and power added efficiency.(* Simulations with other frequencies are very close or in between the simulation results 26.6 GHz and 29.2 GHz)

Fig. 8. Measured power detector output voltage versus output power.(*Simulation results with the frequencies are almost the same and depicted with nominal data)

IV. CONCLUSIONS

This paper presents a Ka-band power amplifier with on-chip power detector in a commercial 0.15 ${\mu}$m GaAs pHEMT technology. The chip size is 2.09 mm ${\times}$ 1.28~mm including on-chip power detector and I/O pads. The die chip is attached on a commercial QFN package to evaluate the performances in surface mount use. The power detector has very coherent output voltage across the operation frequency from 26.6 GHz to 29.2 GHz. The saturated output power is over 27.4 dBm, with the PAE$_{\mathrm{max}}$ of 25~30%. The authors expect this work will contribute to performance improvement and commercialize of mm-wave systems such as 5G FR2 applications.