Mobile QR Code QR CODE

  1. (School of Electronic and Electric Engineering, Daegu University, Gyeongsan 38453, Korea)

Fine dust sensor, MEMS resonator, Delay-locked loop (DLL), oscillator, CMOS, high resolution, 38453


Recently, damage from respiratory and circulatory diseases caused by air pollution and frequent yellow dust is increasing rapidly. In particular, the threat to our health is increasing because fine dust particle components among harmful substances in the atmosphere penetrate directly into respiratory organs. Therefore, the demand for home and office air purifiers that detect fine dust concentrations and provide clean air is also increasing rapidly. In addition, national interest in damage caused by fine dust concentration has increased, and information on each pollutant concentration is provided through real-time monitoring of air pollution and fine dust concentration using various environmental sensors.

In general, fine dust is invisible thin and small dust particles with a diameter of less than 10-${\mu}$m. Unlike the ordinary dust, a fine dust is very light and can float in the air for a long time without precipitation, so there is a high risk of penetrating deeply into human lungs. Therefore, there is a growing demand for sensor technology capable of measuring the concentration of very small fine dust. Representative methods of measuring conventional fine dust include a filter-based gravimetric measurement, ${\beta}$-ray absorption method, and light scattering method [1-3]. Among them, the light scattering method capable of real-time continuous measurement is most widely used. However, the method using optics is less reliable because the measurement error turns on when measuring dust smaller than the wavelength of light used to measure fine particles. In addition, since the physical space required to implement the optical system is required, it is difficult to miniaturize the size of the fine dust meter, the price of the optical element used is relatively expensive, and power consumption is very high.

Various attempts have been made to implement fine dust sensors using a small resonator using semiconductor microelectron-mechanical-systems (MEMS) technology to replace previously widely used optical dust sensors [4,5]. As illustrated in Fig. 1, this MEMS resonant sensor is characterized by the frequency of an oscillator composed of MEMS resonators becomes lower as the number of particles increases depending on the fine dust particle number, i.e., concentration. If the frequency variation of the oscillator implemented with the MEMS resonator can be known, the concentration of fine dust can be predicted relatively accurately. Therefore, the accuracy of measuring the concentration of fine dust is determined by how closely the oscillator implemented with the MEMS resonator can distinguish the variation of the frequency that changes in response to the weight of fine dust. Recently, a frequency discriminator implemented based on a delay-locked loop (DLL) structure using MEMS resonator for a fine dust sensor has been published [6].

This paper implements an oscillator for a fine dust sensor using MEMS resonator and proposes a high-resolution low-power frequency-to-digital converter (FDC) to distinguish the concentration of small fine dust. Although it is implemented based on the same structure as the existing DLL structure, the dual-loop digital DLL structure and hybrid search algorithm are applied to predict frequency changes more accurately according to fine dust concentration. So, the proposed structure for a high-resolution frequency shift detector is suitable for a fine dust sensor using resonant MEMS sensor. A description of the proposed FDC structure and the overall system architecture are provided in Section II. Section III presents the detailed circuit schematics to implement oscillator and frequency-to-digital converter for a MEMS fine dust sensor. Section IV verifies the operational characteristics of the proposed circuit through simulation and experimental results, and finally concludes in Section V.

Fig. 1. Frequency characteristics of MEMS resonant sensor oscillator according to weight of fine dust particles.


As illustrated in Fig. 1, the basic principle of MEMS resonant sensor is that as the weight of fine dust particle increases, the frequency of oscillator made based on MEMS resonator becomes lower than the frequency of the reference oscillator when there are no fine dust particles. Thus, in order to know the number or concentration of particles of fine dust, it can be predicted by measuring the difference between the reference frequency when there is no fine dust and the changed frequency according to the concentration of fine dust. Therefore, the MEMS resonant fine dust sensor consists of an oscillator composed of a MEMS resonator and a frequency-to-digital converter that measures in real time the amount of change in the oscillator frequency according to the fine dust concentration and converts it into a digital code value, as shown in Fig. 2. In order to find the oscillation frequency, a widely used method is generally to count how many frequency clocks are of an oscillator using a MEMS resonator within a very accurate clock period outside a chip such as a temperature compensated crystal oscillator (TCXO). However, an additional external very accurate crystal oscillator is required. In addition, as the input frequency of the fine dust sensor oscillator increases, the N value of the frequency divider increases, and power consumption increases. For fine dust sensors, it is more important to recognize very small frequency changes compared to the reference frequency rather than to find the exact frequency of the input signal. The recently announced frequency discriminator using the DLL structure can convert the frequency value into a digital code value that controls the delay cell without the need for an external accurate crystal oscillator [6]. In addition, errors caused by phase noise and waveform characteristics of the MEMS oscillator are corrected in the delay cell loop, so that more accurate frequency differences can be found. However, in order to distinguish more accurate frequency deviations, the delay value of the delay cell must be very small, and the exact control code value must be obtained.

Fig. 2. General frequency discriminator structure using an external accurate clock signal.

To overcome these problems, we propose a readout integrated circuit (ROIC) architecture optimized for fine dust sensors, including a frequency shift detection circuit that can detect a very small frequency change of oscillator for fine dust sensor with MEMS resonator structure as shown in Fig. 3. In order to implement a delay cell with very high delay resolution characteristics, a dual-loop DLL structure FDC architecture has been proposed. The dual-loop DLL structure consists of a coarse delay loop for tracking delay changes caused by process, voltage, and temperature (PVT) variations and a fine delay loop corresponding to very small frequency changes caused by fine dust [7]. Each of the proposed dual loop can operate independently. In addition, a hybrid search algorithm is applied to find digital code values that accurately control delay cells with very small delay characteristics. As shown in Fig. 3, successive approximation register (SAR) and modified SAR (MSAR) controllers are used for a coarse delay-loop, and a sequential search algorithm is applied to a fine delay-loop [8]. An analog type of delay cell is used for a fine delay-loop, and the digital code obtained by the sequential controller is converted into an analog voltage (V$_{\mathrm{tune}}$) to control these delay cells.

Fig. 3. Block diagram of a high-resolution frequency-to-digital converter using the proposed hybrid dual-loop delay-locked loop (DLL) structure.


A. Oscillator Circuit using a MEMS Resonator

Fig. 4 is an oscillator circuit schematic that operates as a fine dust sensor using a piezo electronic resonator implemented with MEMS technology. When fine dust particles are implanted on MEMS piezo electronic resonator, the oscillation frequency is slightly lowered, and when a larger amount of fine dust particles is placed on the oscillator sensor, the oscillation frequency is even lower than when there is no fine dust. If this frequency variation can be accurately obtained, the concentration of fine dust particles will be predicted. Fig. 4 is an electrical RLC equivalent circuit model of piezo MEMS resonant element, and each parameter value was extracted using the modified Bntterworth-Van Dyke (mBVD) model [9]. The oscillator circuit used as the fine dust sensor in Fig. 4 is designed based on the Colpitts oscillator structure [10]. Here, the MEMS resonator serves as an inductor. The oscillation frequency of the Colpitts oscillator is determined by the values of L$_{\mathrm{s}}$ and C$_{1}$ & C$_{2}$ (usually C$_{1}$ = C$_{2}$) of the MEMS oscillator in Fig. 4. The main core current (I$_{\mathrm{b2}}$) of the oscillator is implemented to be adjusted through SPI control to ensure desired frequency characteristics and optimize current consumption of the oscillator. An oscillated RF signal was converted into a full swing voltage signal using an amplifier of the static CMOS inverter structure so that the frequency divider, which is the first block of the FDC circuit, could be sufficiently driven. In addition, a 50-ohm driving buffer for measurement is added to verify the characteristics of the oscillator for MEMS fine dust sensors.

Fig. 4. Schematic of oscillator circuit using MEMS resonator.

B. Frequency-to-digital Converter (FDC)

As shown in Fig. 3, an FDC is proposed that converts a change in the oscillation frequency of MEMS fine dust sensor generated depending on the concentration of fine dust particles into a digital code value. The proposed FDC, like the previously implemented frequency discriminator, applies the basic operating principle of DLL, in which the input frequency signal is delayed one cycle after passing through the delay cells in DLL providing appropriate delay characteristics. Therefore, when there is a change in the oscillation frequency of the MEMS sensor, the control code of the delay cell is changed by the feedback loop. In the absence of fine dust, the control code of the DLL and the control code obtained from the DLL change the oscillation frequency of the fine dust sensor, resulting in a difference. Through this difference value, the frequency change amount generated by the fine dust can be predicted, and the concentration of the fine dust can be calculated from the frequency change amount. In order to distinguish the concentration of very small fine dust (PM 2.5 or less), the resolution of the frequency discriminator circuit should be small and FDC having very high-resolution characteristics is required. Considering that the characteristics of the target MEMS resonance sensor are changes in frequency characteristics where approximately 3 MHz is lowered at an oscillation frequency of 2 GHz when approximately 10 quantities of PM1.0 fine dust are mounted on the sensor, the FDC should be able to detect changes in about 0.75 ps cycles. To distinguish this change, a unit delay cell with a very small delay value of the minimum delay cell constituting the DLL should be used. However, considering the PVT changes (${\pm}$15\%) and additional timing margin, there is a problem that it is difficult to implement due to the additional parasitic effects due to a very large number of delay cells, and power consumption is increased by the high-speed operation delay cell.

First, to solve this problem, a method of implementing FDC based on the N-distracted frequency signal rather than operating the FDC at the MEMS sensor oscillation frequency is utilized to make the difference in time delay according to the frequency change of input signals to be distinguished. And, as shown in Fig. 3, the optimized division ratio determined by considering the silicon area occupied by delay cells is N=8. In addition, an optimal FDC structure is proposed to separate delay cells corresponding to a large range of frequency changes, such as PVT variations, and very small frequency changes depending on the concentration of fine dust. As mentioned in Section II, the FDC architecture of the dual-loop DLL structure operated by dividing into coarse-tuned delay cells and fine-tuned delay cells are adopted. The coarse tuned delay cell is designed to obtain a delay change of up to about 1.5 ns by implementing a unit delay time cell of 1.45 ps in a 10-bit binary-weighted form to follow the frequency change according to the PVT variations of the MEMS oscillator. The frequency change of the oscillator according to fine dust is applied with an analog type of fine delay cell that can distinguish frequency changes from a minimum of 3 MHz to a maximum of 30 MHz (by 100 fine dust), at 2.3 GHz, the maximum oscillation frequency of the resonant fine dust sensor. Finally, the delay times required according to the PVT change and the fine dust concentration change are summarized as shown in Tables 1 and 2.

The operation of the proposed FDC is as follows. First, to predict the initial frequency of the MEMS sensor oscillator without a fine dust, the delay difference between the 8-divided the input signal (CLK$_{\mathrm{ref}}$) and the DLL output signal (CLK$_{\mathrm{out}}$) is compared through a 1-bit time-to-digital converter (TDC). Through the coarse DLL operation, the appropriate digital code values of the coarse delay cells that make the periods of these two signals the same are obtained. At this time, the proposed FDC determines the control code of the coarse-tuned delay cell of 10-bits by two controllers composed of conventional SAR and modified SAR. Second, after the coarse tuned code is determined, a fine DLL operation for detecting the frequency of the MEMS sensor oscillator changed by the fine dust concentration is started. The very small delay time change generated between the CLK$_{\mathrm{ref}}$ and CLK$_{\mathrm{out}}$ signals according to the fine dust concentration is compared with the phase detector in Fig. 3. Therefore, finally, the digital code value required for the fine-tuned delay cell is determined through a fine phase alignment operation according to the analog input voltage (V$_{\mathrm{tune}}$) converted through a RDAC.

As shown in Fig. 3, MSB 6-bits (D[9:4]) of the digital code of the coarse delay cell is determined by conventional binary search SAR logic, and the remaining LSB 4-bits (D[3:0]) is determined by MSAR controller. In general, the control code of the coarse tuned delay cell is determined by a binary search SAR algorithm using 1-bit TDC. When the binary search SAR is finished operating, the phase detector is finally operated to generate an UP/DN signal. In this case, if the UP signal and the DN signal are not the same, the MSAR operates in counter mode to determine the code value of the LSB D[3:0]. A detailed operation algorithm for finding the coarse tuned control code can be seen from Fig. 5.

Fig. 5. Flow chart of SAR/MSAR controller for coarse delay-lock loop operation.

As described above, after the coarse tuned delay cell control code value is determined by the SAR/MSAR controller, the controller logic block related to fine DLL is operated to detect that the frequency of the MEMS sensor oscillator changes according to the fine dust concentration. In order to obtain a high delay resolution through a fine phase alignment operation, the counter value of the fine delay cell is determined by the UP/DN signal of the phase detector. The determined counter code value is converted into an analog input voltage (V$_{\mathrm{tune}}$) through 5-bits RDAC and RC LPF filter to adjust the delay of the fine delay cell. Therefore, the proposed FDC operates as a high-resolution frequency discriminator circuit of 10-bit or higher through a dual-loop DLL structure using a hybrid code search algorithm.

C. Coarse and Fine Delay Cell Implementation

Fig. 6 shows circuit schematics of coarse delay cells and fine delay cells used in the proposed hybrid dual-loop FDC. As shown in Fig. 6(a), the coarse tuned delay cell is implemented as an RC delay type determined by the static inverter buffer and binary weighted switched capacitors. The desired delay time can be obtained by turning on or off the capacitor connected to the buffer output node according to the control code. The minimum and maximum periodic signals input by FDC during the coarse DLL operation are about 4.71 ns and 3.48 ns, as shown in Table 1. Therefore, coarse delay cells should be covered up to about 1.5 ns, which was implemented as a 10-bit binary code (D [9:0]).

Table 1. Delay Time Calculation of Coarse Delay Cell

PVT variations (${\pm}$15%)





















~ 434.8

~ 3478





~ 588.2

~ 4706








~ 1228

Table 2. Delay Time Calculation of Fine Delay Cell

# of particles














~ 434.8

~ 3478




~ 435.4

~ 3483




~ 440.5

~ 3524






Fig. 6. (a) coarse delay line cell structure; (b) fine delay line cell structure.

Fine delay cells require very high delay resolution to detect small frequency changes in MEMS sensors caused by the fine dust. As shown in Fig. 6(b), the fine delay cells for obtaining minute delay adjustment characteristics are implemented as an analog type delay cell composed of an inverter buffer and a MOS varactor, unlike the coarse delay cell. The capacitance value of the MOS varactor varies according to the analog voltage value (V$_{\mathrm{tune}}$), and the RC delay value will be also adjusted accordingly. The compensation technique is applied to ensure that the amount of delay change generated in the fine delay cell according to the input control voltage of the MOS varactor has an almost uniform value [11]. As shown in Fig. 7(b), fine delay cells are divided into two blocks with different MOS varactor reference voltage values (V$_{\mathrm{B1}}$ and V$_{\mathrm{B2}}$) and connected in parallel. The two fine delay cell blocks with different reference voltages have different capacitance variation (K$_{\mathrm{c1}}$ and K$_{\mathrm{c2}}$) characteristics in accordance with the V$_{\mathrm{tune}}$ voltage. Therefore, the overall K$_{\mathrm{c}}$ characteristics of the fine delay cells can be maintained almost constant if appropriate V$_{\mathrm{B1}}$ and V$_{\mathrm{B2}}$ reference voltages are selected. In addition, V$_{\mathrm{B1}}$, V$_{\mathrm{B2}}$, and V$_{\mathrm{ref}}$ voltages of RDAC will be adjusted through SPI control to maintain the linearity characteristics of fine delay cells against PVT variations.

Fig. 7. Results of the proposed frequency-to-digital converter's behavioral model transient simulation: (a) process of generating 10-bits code (D[9:0]) for coarse delay cell by SAR/MSAR controller; (b) when the fine input frequency changes, the lock process of fine delay loop.


Fig. 7 shows the results of the behavioral model simulation to verify the dual-loop behavior of the proposed frequency-to-digital converter (FDC). Fig. 7(a) shows the SAR/MSAR controller operation that finds the control code (D[9:0]) of 10-bits by the coarse delay locked-loop operation. When a START enable signal is input to the SAR/MSAR controller, the SAR controller first determines the MSB 6-bits of coarse delay code (D[9:4]) through binary search algorithm. Then, in the MSAR controller, the remaining coarse delay control code is first found by the binary search method, and then switched to the sequential search mode to finally determines LSB 4-bits (D[3:0]) of the coarse delay code.

When the control code of the coarse delay loop that matches the period of the initial RF input signal generated by the MEMS fine dust sensor is determined, the sequential logic controller for detecting the fine dust concentration by the fine DLL starts operation. When operating the coarse DLL, the initial code of the fine delay cell is always fixed to a value of A[4:0]=00000. If the frequency of the MEMS sensor oscillator changes due to fine dust after the coarse DLL is locked, an up signal is generated from the phase detector and the fine code value locked by the fine DLL operation is searched using a sequential search method, and the concentration of fine dust is continuously monitored through the fine DLL. The fine control code (A[4:0]) is converted to an analog voltage via RDAC and is input to the control voltage of the MOS varactor of the fine delay cell to change the capacitance of the fine delay cell, increasing or decreasing the delay.

Fig. 7(b) shows the simulation result of verifying the fine DLL operation when the fine dust concentration increases after the initial control voltage (V$_{\mathrm{tune}}$) of the fine DLL starts from V$_{\mathrm{DD}}$/2. The increase in the concentration of fine dust is confirmed by finely lowering the frequency entering the FDC. As can be seen in Fig. 7(b), it has been verified that the controller of the fine DLL is operated correctly by increasing the V$_{\mathrm{tune}}$ so that the delay increases by fine DLL when the FDC input frequency is changed by 3 MHz at 480 ${\mu}$s and the 6 MHz is additionally lowered at 640 ${\mu}$s. Fig. 8(a) is the photograph of a silicon chip fabricated using a 0.18${\mu}$m CMOS process of the proposed high-resolution FDC and an oscillator and its chip size is 1500 ${\mu}$m ${\times}$ 600 ${\mu}$m. Also, Fig. 8(b) is an evaluation board for characteristics measurement. The Power consumption of the proposed FDC including an oscillator is 16 mW from 1.8 V power supply at a 2 GHz oscillation frequency. Fig. 9 shows the output spectrum measurement results of the CMOS oscillator for MEMS fine dust sensors. The oscillation frequency is 1.97 GHz, which is the result of the absence of fine dust particle, and it is measured using a 50ohm driving buffer, as shown in Fig. 4.

Fig. 8. (a) Die photograph; (b) photograph of evaluation board.
Fig. 9. Measured output spectrum of oscillator using a MEMS resonator.

In addition, to verify the characteristics of the proposed frequency-to-digital converter, the input signal of 1.7 GHz ~ 2.3 GHz is applied to the FDC input node using an RF signal generator, and then the coarse & fine control code values are read through SPI control to check the operation of FDC. Fig. 10 represents the result obtained by reading fine control code (A[4:0]) which becomes lock according to the frequency of fine delay loop while changing the input frequency after coarse lock. In this case, the three input frequencies (1.81 GHz, 2.05 GHz, and 2.3 GHz) are expressed in decimal numbers as control code D[9:0] of the coarse delay cell obtained when the FDC is locked, respectively, 917, 531, and 168. From Fig. 10(a), it can be seen that the DLL of the coarse delay cell sufficiently will cover the target input frequency range of 1.7 GHz to 2.3 GHz, and similarly, the fine delay cell sufficiently can satisfy the frequency change (> 30 MHz) according to the target fine dust concentration. Fig. 10(b) illustrates the 1-bit resolution of the fine delay cell as the result of measuring the input frequency change that could be obtained when the value of each 1-bit code changes in the fine delay cell. The measured 1-bit resolution value varies from about 1.5 MHz to 3.3 MHz depending on the V$_{\mathrm{tune}}$ voltage. As mentioned in Section III, as a result of applying the compensation technique to improve the linearity characteristics of the MOS varactor, it can be seen that the target 3 MHz frequency change can be sufficiently distinguished by the proposed frequency-to-digital converter. The design and measurement results of the proposed frequency-to-digital converter and MEMS resonant sensor oscillator are summarized in Table 3 by comparing the previously published results.

Fig. 10. Measurement results of frequency-to-digital converter (three input frequencies such as 1.81 GHz, 2.05 GHz, and 2.3~GHz: (a) frequency response; (b) 1-bit resolution frequency.
Table 3. Comparison with Previous Works

JCAS 2021 [6].

This work

Process & Technology

180 nm & 1.8 V

180 nm & 1.8 V

Frequency range

1890 ~ 2468 MHz

1700 ~ 2300 MHz


Hybrid single loop

Hybrid dual loop

Tuning range @input



# of bits (delay cells)




Min. resolution @input

36 kHz x 4

= 144 kHz

3 MHz

Power consumption

12 mW

(only FDC)

16 mW

(Osc. + FDC)


An oscillator and frequency-to-digital converter for low power and ultra-small fine dust sensor to measure the concentration of fine particle are implemented using the 0.18 ${\mu}$m CMOS process based on the DLL structure. The proposed frequency-to-digital converter implemented a very wide range of frequency operations and a very high delay resolution through the hybrid delay cell structure and digital DLL of dual-loop operation to distinguish frequency changes of the MEMS sensor oscillator due to very small fine dust. A frequency change, in which a frequency of the MEMS sensor oscillator is decreased by about 3 MHz due to 10 fine dust particles, can be converted in digital code to ensure a characteristic to distinguish a change in the fine dust concentration. The core silicon area of the implemented MEMS oscillator and frequency-to-digital converter occupies 0.9 mm$^{2}$ and consumes about 16 mW of power at 1.8 V supply voltage. Therefore, low-power and ultra-small fine dust sensors can be implemented using a MEMS resonant sensor and the proposed frequency-to-digital converter.


This research was supported by the Daegu University Research Grant, 2018. The author would like to thank Dr. Sangyoub Lee, RNSLab Co.,Ltd, Daejeon, Korea, for his valuable discussion and helps.


Wang Z., Calderón L., Patton A. P., Allacci M. S., Senick J., Wener R., Andrews C. J., Mainelis G., Nov. 2016, Comparison of real-time instruments and gravimetric method when measuring particulate matter in a residential building, Journal of the Air & Waste Management Association, Vol. 66, No. 11, pp. 1109-1120DOI
Huang C-H., Tai C-Y., Sep. 2008, Relative humidity effect on PM 2.5 readings recorded by collocated beta attenuation monitors, Environmental Engineering Science, Vol. 25, No. 7, pp. 1079-1090DOI
Patts J. R., Tuchman D. P., Rubinstein E. N., Cauda E. G., Cecala A. B., Aug. 2019, Performance Comparison of Real-Time Light Scattering Dust Monitors Across Dust Types and Humidity Levels. Mining, metallurgy & exploration, Vol. 36, No. 4, pp. 741-749DOI
Paril S. B., Chu V., Conde J.P., Apr. 2009, Mass Sensing using an Amorphous Silicon MEMS resonator, Procedia Chemistry, Vol. 1, No. 1, pp. 1063-1066DOI
Choi J-S., Park W-T., Oct. 2020., MEMS particle sensor based on resonant frequency shifting, Micro and Nano Syst Lett, Vol. 8, No. 17DOI
Park S. E., Kim J. Y., Park H. G., Bang J. E., Shin Y. H., Choi J. H., Jul. 2021., Frequency discriminator for the fine dust sensor, Journal of Integrated Circuits and Systems, Vol. 7, No. 3URL
Kim J., Han S.-W., Aug. 2016, A high-resolution dual-loop digital DLL, Journal of Semiconductor Technology and Science, Vol. 16, No. 4, pp. 520-527DOI
Mittal P., 2018, A successive approximation register based digital delay locked loop for clock and data recovery circuits, Master's thesis, Indraprastha Institute of Information TechnologyURL
Bjurstrom J., Vestling L., Olsson J., Katardjiev I., 2004, An accurate direct extraction technique for the MBVD resonator model, 34th European Microwave Conference, pp. 1241-1244URL
Razavi B., 1998, RF Microelectronics, Englewood Cliffs, NJ: Prentice-HallGoogle Search
Lee J., Choi S., Cho Y., Choi J., Jan. 2018, Linearly frequency-tunable and low-phase noise ring VCO using varactors with optimally-spaced bias voltages, Electronics Letters, Vol. 54, No. 6, pp. 342-343DOI
Hyunwon Moon

Hyunwon Moon received the B.S. degree in radio science and engi-neering from Hanyang University, Korea, in 1997, and the M.S. and Ph. D. degrees in EECS from KAIST, Korea, in 1999 and 2004, respectively. In 2004, he joined Samsung Electronics, Gyeonggi, Korea, as a senior engineer, and designed multi-band multi-mode RF transceiver ICs for cellular phone and developed receiver IC for the wireless connectivity system such as GPS and FM. In 2012, he joined the school of Electronic and Electric Engineering, Daegu University, Gyeongsan, Korea and is now an Associate Professor. His research interests including CMOS mmWave/RF/Analog integrated circuits and systems for wireless communications such as WSNs and 5G cellular systems.