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Cavity, Barometric Pressure Sensor, Integration with MOSFETs, CMOS Compatible Process Technology

## I. INTRODUCTION

In the IoT era, the importance of barometric pressure sensor is emerging. Many smart devices are equipped with barometric pressure sensors and are being used for weather forecasts and altitude measurements (1-4). The demands of these barometric sensors are expected to increase, and the development of more sensitive and smaller barometric sensors are required (5-7). If barometric sensor and Metal Oxide Semiconductor Field Effect Transistor (MOSFET) are fabricated on the same Silicon (Si) substrate, the cost and steps of the fabrication process can be reduced. In addition, the circuit composed of MOSFETs integrated with the sensor can reduce the power consumption and the overall size of the sensor system. Most barometric sensors have been fabricated using Micro Electro Mechanical System (MEMS) process technology (3-8). MEMS process technology has been widely used in the fabrication of sensors due to its low fabrication cost and simple processes. However, barometric sensors fabricated by using MEMS process technology are large in size. Moreover, because MEMS process technology is not compatible with Complementary Metal Oxide Semiconductor (CMOS) process technology, it is impossible to fabricate the circuit consisting of the barometric sensor and MOSFETs on the same substrate.

It is difficult to make a cavity under the Si substrate of the MEMS barometric sensors. Typically, the cavity can be made by the back-side etching process of the Si substrate or the Si substrate etching process using KOH solution (8-11). However, the barometric sensors fabricated by these MEMS processes have a quite thick diaphragm, so the sensitivities of the barometric sensors are relatively low (10-13). Therefore, a large area diaphragm is required to increase the sensitivity of MEMS barometric sensors.

In this paper, we adopt CMOS process technology to fabricate the barometric sensors and MOSFETs on the same Si substrate using only 5 masks. Line-shaped etching holes were made using a photomask, and the cavity was formed by isotropic etching process on the front side of the Si substrate. The barometric sensor has a thin diaphragm, which can reduce the size of the sensor (14). In addition, the sensitivity of the barometric sensor was improved by connecting the air pockets around barometric sensor. In addition, MOSFETs were fabricated on the same substrate and the operating characteristics of MOSFETs are verified (15,16).

Fig. 1. Schematic key process steps for the cavity, (a) patterning of line-shaped etching holes, (b) isotropic etching using SF$_{6}$ gas through the etching holes, (c) narrowing the etching holes by depositing PE-TEOS SiO$_{2}$, (d) anisotropic etch-back process for PE-TEOS SiO$_{2}$ thickness reduction, (e) deposition of another PE-TEOS SiO$_{2}$ layer to fully seal the etching holes, (f) etch-back process for thickness reduction of the SiO$_{2}$ diaphragm.

Fig. 2. (a) Top SEM view taken after patterning line-shaped etching holes, (b) top SEM view taken after isotropic etching process, (c) top SEM view taken after etch-back process for PE-TEOS SiO$_{2}$ layer, (d) top SEM view taken after fully sealing the etching holes, (e) cross-sectional SEM view taken after fully sealing the etching holes.

Fig. 3. Schematic cross-sectional views for key process steps, (a) after sealing the cavity of the barometric sensor, (b) defining the active region of MOSFETs, (c) patterning of piezoresistors of barometric sensors and gates of MOSFETs, (d) after deposition of the ONO passivation layer, (e) a barometric sensor, an MOSFET and an MOSFET with FG implemented on the same substrate.

## II. FABRICATION

Using CMOS technology, barometric pressure sensors with air pockets are efficiently integrated with the MOSFETs on the same substrate. In this technology, MOSFETs are manufactured in two structures. One is a programmable/ erasable p-type MOSFET with a horizontal floating gate (FG) and the other is a p-type MOSFET with a p$^{+}$ polysilicon gate (15,16). A 6-inch p-type (100) bulk Si wafer is used to fabricate the barometric sensor and MOSFETs, and five photo masks are used. Fig. 1 shows key schematic process steps for the formation of the cavity in the barometric sensors. First, 300 nm thermal SiO$_{2}$ layer is grown on the Si substrate. The 300 nm SiO$_{2}$ layer is patterned with 0.5 ${μ}$m width line-shaped etching holes. Square SiO$_{2}$ patterns with an area of 3${\times}$3 ${μ}$m$^{2}$ are remained at 8 ${μ}$m intervals (Fig. 1(a)). These patterns are used to form Si anchors after the isotropic etching process. Fig. 2(a) is the top SEM view taken after patterning of line-shaped etching holes. A cavity with a depth of 2.5 ${μ}$m is formed by isotropic etching process using Sulfur Hexafluoride (SF$_{6}$) gas through the line-shaped etching holes. Fig. 1(b) and Fig. 2(b) show a cross-sectional schematic and a top view SEM image after cavity formation, respectively. During the isotropic etching process, the Si substrate under the square SiO$_{2}$ patterns are not fully etched and remain as anchors (14). Note that all areas of barometric sensor have anchors, except for the central region of the barometric sensor where variable piezoresistors are placed. The etching holes to form the cavity is sealed using a non-conformal deposition profile of Plasma Enhanced Tetraethyl Orthosilicate (PE-TEOS). A layer of SiO$_{2}$ is deposited using PE-TEOS, which creates an over-hang profile in the etching holes (Fig. 1(c)). Next, the thickness of the SiO$_{2}$ layer formed using PE-TEOS layer is reduced by an anisotropic etch-back process (Fig. 1(d)). Fig. 2(c) shows that the width of the etching holes is narrowed. Then another layer of PE-TEOS SiO$_{2}$ is deposited again to completely seal the narrowed etching holes (Fig. 1(e)). Next, the thickness of the PE-TEOS SiO$_{2}$ layer is reduced again by anisotropic etch-back process. Fig. 1(f) and Fig. 2(d) show cross-sectional schematic and top SEM images of the sealed cavity, respectively. And Fig. 2(e) shows a cross-sectional SEM view of the sealed cavity. The final PE-TEOS SiO$_{2}$ layer with a thickness of 0.5 ${μ}$m becomes the diaphragm of the barometric sensor. Fig. 3 shows schematically the process flow after sealing the cavity of the barometric sensor. As shown in Fig. 3(a), part of the thermal SiO$_{2}$ layer (formed in Fig. 1(a)) and the PE-TEOS SiO$_{2}$ layer are also formed in the region (active region) where the MOSFETs are fabricated. The SiO$_{2}$ layer on the active region is selectively removed by HF wet etching process (Fig. 3(b)). Then the gate-oxide layer is grown and 0.35 ${μ}$m thick undoped Polycrystalline Silicon (Poly-Si) layer is deposited on the gate-oxide layer. Next, heavy Boron (B) ions are implanted into the Poly-Si layer (14,17). Substrates are annealed at 1050 $^{\circ}$C for 5 seconds. The Poly-Si layer is patterned as the piezoresistor of the barometric sensor and the gate of MOSFETs (Fig. 3(c)). After ion implantation and subsequent heat treatment for the source/ drain of the MOSFETs, SiO$_{2}$/ Si$_{3}$N$_{4}$/ SiO$_{2}$ (ONO) passivation layers are deposited (Fig. 3(d)). In the ONO stack, the thickness of each later is 10 nm, 20 nm and 10 nm in order. Next, contact windows opened and a metal layer is deposited and patterned (Fig. 3(e)).

## III. RESULTS AND DISCUSSION

To make a small barometric sensor, it is important to make a thin diaphragm. The sensitivity of the barometric sensor is inversely proportional to the square of the diaphragm thickness and is proportional to the area of the diaphragm (18). Therefore, if the thickness of the diaphragm is reduced, the sensitivity of the barometric sensor can be improved and the overall size of the barometric sensor can also be reduced. Table. 1 compares the size of the sensors and the thickness of the diaphragms of the different barometric sensors. Our barometric sensor has a thin diaphragm with a thickness of 0.5 ${μ}$m, so the overall size of our sensor is relatively smaller than that of other sensors.

Fig. 4. (a) Top optical view of the barometric senor without air pockets. (b) Top optical view of the barometric senor with four air pockets. (c) Top view SEM image of the piezoresistors placed on the diaphragm of the barometric sensor. The insert is the equivalent circuit of the fabricated barometric pressure sensor.

Fig. 4(a) shows a top optical view of a barometric sensor with a diaphragm area of 100${\times}$100 ${μ}$m$^{2}$. Fig. 4(b) is an optical image of a barometric sensor with air pockets. Four air pockets, each with an area of 100${\times}$100 ${μ}$m$^{2}$, are connected to the top, bottom, left and right of the barometric sensor to increase the total volume of the cavity, improving the sensitivity of the barometric sensor. Because the anchors are placed in all areas except the central region of the diaphragm, where the variable piezoresistors are placed, the stress due to atmospheric pressure difference is concentrated only in the central region. Fig. 4(c) shows the top view SEM image of the piezoresistors placed on the diaphragm of the barometric sensor. Two fixed piezoresistors are placed on the Si substrate and two variable piezoresistors are placed on the central diaphragm where no anchors are placed. Two fixed piezoresistors and two variable piezoresistors are connected by the metal wiring layer to compose the Wheatstone bridge circuit (1,14,19).

Fig. 5. Output voltage change of the barometric sensor with atmospheric pressure depending on the presence of air pockets.

Fig. 5 shows the change in output voltage of the Wheatstone bridge circuit as the atmospheric pressure changes. The sensitivity of the barometric pressure sensor with and without air pockets is 1.2 ${μ}$V/hPa and 0.8 ${μ}$V/hPa, respectively. As air pockets are connected to the barometric sensor, the volume of the cavity increased, improving the sensitivity of the barometric sensor.

Fig. 6. (a) Top SEM image of a MOSFET. (b) Top SEM image of a MOSFET with horizontal FG. (c) Schematic of cross-sectional structure where CG and FG overlap in a MOSFET with FG.

Fig. 6(a) is the top SEM image of a p-type MOSFET fabricated with barometric pressure sensors. Fig. 6(b) is the top SEM image of a p-type MOSFET with horizontal FG. Both MOSFETs have a channel length of 1 ${μ}$m and a channel width of 2 ${μ}$m. The MOSFET with FG can achieve high coupling ratio by finger-patterning one end of the horizontal FG. Fig. 6(c) shows a schematic cross section of the overlapping structure of FG and Control Gate (CG) in a MOSFET with horizontal FG. Since the MOSFET’s FG and CG are separated by the ONO insulating stack, the MOSFET’s threshold voltage can be controlled by applying a program or erase voltage to CG.

Fig. 7. (a) Drain current versus gate bias curves of a p-type MOSFET as a parameter of drain bias. (b) Drain current versus drain bias curves of a p-type MOSFET as a parameter of gate bias. (c) Drain current versus CG bias curves of a p-type MOSFET with horizontal FG as parameters of V$_{\mathrm{PGM}}$ and V$_{\mathrm{ERS}}$.

Fig. 7(a) and (b) show reasonable drain current versus gate bias, and drain current versus drain bias curves of a fabricated p-type MOSFET. Fig. 7(c) shows drain current versus CG bias curves of a fabricated p-type MOSFET with horizontal FG as parameters of program and erase pulse biases (V$_{\mathrm{PGM}}$ and V$_{\mathrm{ERS}}$). It is important to note that the threshold voltage of the MOSFET with FG can be tuned by adjusting the magnitude, polarity and width of the applied pulse voltage. The MOSFET with tunable threshold voltage can be used as flash memory devices.

Table. 1. Comparison of area and diaphragm thickness of barometric sensors in published papers and this work.

 Reference number(s) This Work (without Air Pockets) This Work (with Air Pockets) [8] [12] Sensor Size (μm) 100 × 100 300 × 300 680 × 680 500 × 500 Diaphragm Thickness (μm) 0.5 0.5 3~6 3

## IV. CONCLUSIONS

We proposed a process technology that can fabricate efficiently MOSFETs and barometric sensors on the same Si substrate. Air pockets are placed around the barometric sensor to improve the sensitivity of the barometric sensor. In addition, this barometric sensor has a thin diaphragm with 0.5 ${μ}$m thickness, so it can be fabricated in a small size. Conventional MOSFET and MOSFET with tunable threshold voltage are fabricated with the barometric sensors, and their characteristics are verified that the sensitivity of the barometric pressure sensor with and without air pockets is 1.2 ${μ}$V/hPa and 0.8 ${μ}$V/hPa, respectively.

### ACKNOWLEDGMENTS

This work was supported by the National Research Foundation of Korea (NRF-2016R1A2B3009361) and the Brain Korea 21 Plus Project in 2019.

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## Author

##### Dongkyu Jang

Dongkyu Jang received the B.S. and M.S. degrees in Electrical Engineering from Korea University, Seoul, in 2008 and 2010, respectively.

In 2010, he joined at Samsung Electronics, where he has been working in the area of DRAM integration.

He is currently pursuing the Ph.D. degree with the Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea.

He is also with the Inter-University Semiconductor Research Center, SNU.

His current research interests include pressure sensors and gas sensors.

##### Gyuweon Jung

Gyuweon Jung received the B.S. degree in Electrical and Computer Engineering from Seoul National University, Seoul, in 2018.

He is currently pursuing the Ph.D. degree with the Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea.

He is also with the Inter-University Semiconductor Research Center, SNU.

His current research interests include gas sensors and electronic nose.

##### Yujeong Jeong

Yujeong Jeong received the B.S. degree in Electrical and Computer Engineering from Seoul National University, Seoul, Korea in 2017. She is currently working toward a combined master’s and doctorate program in Department of Electrical and Computer Engineering at Seoul National University (SNU), Seoul, Korea.

She is also with the InterUniversity Semiconductor Research Center, SNU.

Her current research interests include FET-based sensor platform design and sensing materials.

##### Seongbin Hong

Seongbin Hong received the B.S. degree in Electrical and Computer Engineering from Seoul National University, Seoul, Korea in 2016.

He is currently working toward a combined master’s and doctorate program in Department of Electrical and Computer Engineering at SNU.

He is also with the Inter-University Semiconductor Research Center, SNU. His current research interests include FET-based sensor platform design and fabrication.

##### Jong-Ho Lee

Jong-Ho Lee received the B.S. degree from Kyungpook National University, Daegu, Korea, in 1987 and the M.S. and Ph.D. degrees from Seoul National University, Seoul, in 1989 and 1993, respectively, all in Electronic Engineering.

In 1993, he worked on advanced BiCMOS process development at ISRC, Seoul National University as an Engineer.

In 1994, he was with the School of Electrical Engineering, Wonkwang University, Iksan, Chonpuk, Korea.

In 2002, he moved to Kyungpook National University, Daegu, Korea, as a Professor of the School of Electrical Engineering and Computer Science.

Since September 2009, he has been a Professor in the School of Electrical and Computer Engineering, Seoul National University, Seoul, Korea.

From 1994 to 1998, he was with ETRI as an invited member of technical staff, where he worked on deep submicron MOS devices, device isolation.

From August 1998 to July 1999, he was with Massachusetts Institute of Technology, Cambridge, as a postdoctoral fellow, where he was engaged in the research on sub–100 nm double-gate CMOS devices.

He has authored or coauthored more than 216 papers published in refereed journals and over 326 conference papers related to his research and has been granted 85 patents in this area.

He received 18 awards for excellent research papers and research excellence.

He invented bulk FinFET, Saddle FinFET (or bCAT) for DRAM cell, and NAND flash cell string with virtual source/drain, which have been applying for mass production.

His research interests include CMOS technology, nonvolatile memory devices, thin film transistors, sensors, neuromorphic technology, and device characterization and modeling.