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1. (Chungnam National University, Department of Electronics Engineering, Daejeon 34134, Korea)

Laser detection and ranging (LADAR) receiver, transimpedance combining amplifier (TCA), time of flight (TOF), combined pixel readout scheme

## I. INTRODUCTION

For distance measurements, laser detection and ranging (LADAR) systems have been widely utilized in various applications such as automobiles, robots, and imaging systems [1-5]. For LADAR systems, various distance measurement techniques [6-8], each with their own characteristics have been developed. A pulsed direct time-of-flight (TOF) technique, which measures distances based on the time between a transmitted and a detected optical laser pulse in LADAR systems, is promising because it has the significant advantage of high precision [9-11] compared with other measurement techniques.

To clearly identify the moment of a transmitting and a detecting optical laser pulse in a TOF-based LADAR system, the leading-edge timing discrimination technique is generally used with a transimpedance amplifier (TIA) and a leading-edge timing comparator (TC), owing to its simplicity and high sensitivity [12-14]. However, a major disadvantage of this technique is a large timing error (i.e. walk error) that is caused by the variation of the amplitude in the detected optical laser pulse at the same distance. This variation is induced by the reflectivity of the targeted object and rising time of the pulsed optical laser signal in the LADAR system [12-15]. This severely affects the accuracy of timing measurement (i.e. range accuracy) in pulsed TOF LADAR systems.

When the reflected optical laser pulse reaches the photodetector of the LADAR receiver, its walk error is primarily determined by the finite rising time of the reflected optical laser pulse, although it also depends on the parasitic capacitance of the photodetector ($C_{PD}$) [15]. In Case-1 with a large $C_{PD}$, as shown in Fig. 1, the detection timing difference of a rising edge between maximum and minimum input current pulse ($Δt_1$) is larger than that of Case-2 ($Δt_2$), indicating a larger timing error (walk error) in the first case. Here, $V_{OTIA}$ is the output of the TIA and $V_{REF}$ is the threshold of the TC. The detection timing of the reflected optical pulse is the moment of when $V_{OTIA}$ is larger than $V_{REF}$.

Fig. 1. Walk error depending on the size of $C_{PD}$

Fig. 2. Proposed combined pixel-based LADAR receiver.

The simplest way to reduce the walk error is to reduce the photodetector area for a small $C_{PD}$ while increasing the transmitted optical laser power. However, the effectiveness of this method is limited in two ways. First, the transmitted optical laser power must be limited to ensure the safety of human eyes and skin [16]. Second, the sensitivity of the LADAR receiver is degraded by the small $C_{PD}$ because the size of $C_{PD}$ is closely related to the capability of collecting the echo signal [6,17]. In other efforts [10, 12, 18], with fixed transmitted optical laser power, many studies have focused on walk error compensation techniques at the circuit level with a wide bandwidth TIA. However, these techniques could suffer from a bandwidth limitation because the photodetector area has to be increased to maintain high sensitivity in the LADAR. Considering the increased demands of range accuracy in recent LADAR applications, it would be difficult to fulfill the sensitivity requirement with a small size photodetector.

In this paper, a pixel combining readout scheme for the focal plane array (FPA)-based LADAR architecture [14,19] is proposed to achieve high sensitivity while maintaining accurate range information. In the proposed scheme, photocurrents from four photodetectors of the FPA are combined by the 4-to-1 transimpedance combining amplifier (TCA) into a single voltage output for further processing. Because $C_{PD}$, which is four times larger than in the conventional scheme, can be effectively read by the proposed scheme, as verified in previous studies [20,21], this scheme could improve the sensitivity of the FPA-based LADAR receiver without the loss of the rising time caused by the $C_{PD}$ of a large area photodetector. In this work, we focus on the pixel combining readout FPA-based LADAR receiver for high sensitivity.

The remainders of this paper are organized as follows. Sections II and III describe the proposed LADAR receiver and circuit implementation details. The experimental results and discussions are presented in Section IV, followed by the conclusion in Section V.

The overall block diagram of the proposed prototype LADAR receiver is illustrated in Fig. 2. It consists of five components: a photodetector, an over current protector (OCP), a transimpedance combining amplifier (TCA), a timing comparator (TC), and a time-to-voltage convertor (TVC). In this work, four external capacitances of CEXTs ($PD_{S1-4}$) are used for the photodetector, and its capacitance can be easily varied by various verifications. The OCP is adopted in the front-end LADAR circuit to prevent it from being damaged by an exceeding input photocurrent ($I_{PH}$). Right after the pulsed laser signal ($V_{START}$) is triggered to capture the distance information from the targeted object, the TCA combines four input photocurrents ($I_{PH}$s) from $PD_{S1-4}$, and it amplifies them into a single voltage signal (VOTCA) for further processing. The TC produces a STOP signal ($V_{STOP}$) at the moment which the $V_{OTCA}$ reaches the pre-determined voltage ($V_{REF}$); this indicates the arrival of the returned optical laser pulse signal to the $PD_{S1-4}$. The TVC proportionally converts the timing difference between $V_{START}$ and $V_{STOP}$ into voltage, producing the TOF information. By applying the proposed readout scheme in the FPA-based LADAR, its sensitivity can be increased without a bandwidth problem in the receiver, because the $C_{PD}$ of a four times larger photodetector can be read more effectively than a conventional readout scheme. Avalanche photodiode (APD) issues such as duration, reliability, sensitivity, and cost are applied equally in the proposed receiver and the conventional one.

Fig. 3. Simplified schematic of TCA

Fig. 4. Simplified schematic of TC.

Fig. 5. Simplified schematic of TVC.

## III. CIRCUIT DESCRIPTION

### 1. Transimpedance Combining Amplifier

The simplified schematic of the 4-to-1 TCA is illustrated in Fig. 3. The developed TCA has four TIA copies ($TIA_{1-4}$) of the regulated-cascode (RGC) topology based on the inverter local feedback because the low input impedance results in wider bandwidth [22]. The four input source follower acts as the combiner. The output signals from four TIAs are inputted into four input source follower and summed in the source of $M_4$ ($V_{SUM}$). The transimpedance gain ($Z_{T}$) and small-signal input impedance ($Z_{IN}$) of the TCA is approximately given by

##### (1)
$\mathrm{Z}_{\mathrm{T}}\cong \mathrm{R}_{\mathrm{L}}\cdot \mathrm{A}_{\mathrm{SF}} \\$

##### (2)
$\mathrm{Z}_{\mathrm{IN}}\cong \frac{1}{\mathrm{g}_{\mathrm{m}1}\left(1+\left(\mathrm{g}_{\mathrm{m}2}+\mathrm{g}_{\mathrm{m}3}\right)\mathrm{r}_{\mathrm{o}2}//\mathrm{r}_{\mathrm{o}3}\right)}$

where $A_{SF}$ is the gain of the four-input source follower, $g_m$ is the transconductance of the transistor, and $r_o$ is the output resistance of the transistor. The -3 dB frequency ($f_{-3dB}$) of the TCA is given by

##### (3)
$\mathrm{f}_{- 3\mathrm{dB}}\approx \frac{\mathrm{g}_{\mathrm{m}1}\left(1+\left(\mathrm{g}_{\mathrm{m}2}+\mathrm{g}_{\mathrm{m}3}\right)\mathrm{r}_{\mathrm{o}2}//\mathrm{r}_{\mathrm{o}3}\right)}{2\pi \mathrm{C}_{\mathrm{IN}}}$

where $C_{IN}$ is the total input capacitance of the TCA, given by $C_{IN} \approx C_{PD} + C_{gs2} + C_{sb1}$. Because the current path of $M_6$ is only enabled in the specific condition of $V_{S6} > 1.7 V$, $C_{IN}$ is the total input capacitance of the TCA. Because the size of $C_{PD}$ is reduced to a quarter in the proposed receiver, the TCA has a higher -3 dB frequency compared with the conventional one.

In this work, the targeted full width at half maximum (FWHM) of the input pulse is approximately 5 ns with a rise time of 1 ns. To preserve the shape of the input pulse, the required bandwidth (BW) of the TCA can be approximated from [6] as

##### (4)
$\mathrm{BW}\mathit{\cong }\frac{0.35}{\mathrm{t}_{\mathrm{r}}}$

where $t_r$ is the rise time of the input pulse. Considering the input node parasitic capacitance $C_{IN}$ and $R_P$ of the TCA, approximately 6 pF and 100 Ω, respectively, the target bandwidth is approximately 300 MHz with a transimpedance gain of 65 dB∙Ω. When the same TIA receives photocurrent from a single photodetector with a parasitic capacitance of 6 pF, the TIA has a maximum bandwidth of under 100 MHz and it can preserve the signal pulse with the rising time of approximately 4.7 ns. The walk error in this case would be four times larger than the proposed LADAR receiver.

### 2. Timing Comparator

The TC is designed with three stages consisting of the differential amplifier, the post-amplifier, and the output buffer as shown in Fig. 4. For the differential amplifier, the $V_{OTCA}$ is compared with the $V_{REF}$, and transfers the differential signal ($V_{D1}$ and $V_{D2}$) to the post amplifier, which has a self-biased topology [23]. A positive feedback from the cross-gate connection of $V_{D1}$ through $V_{D2}$ was constituted to increase the gain of the TC. Two inverters are added as output buffer to isolate the load capacitance with an additional gain. Considering approximately ± 12.5 mV as the hysteresis of the TC, a minimum input signal amplitude of 4 μA is targeted in this design. Here, the walk error can be estimated as 2.9 ns corresponding to 43.5 cm as in [12]. In the actual design, the linear operation of the TC was verified with the electrical input pulse from 4 μA to 120 μA as shown in Fig. 11.

### 3. Time-to-voltage Converter

The simplified schematic for the TVC [17] is shown in Fig. 5. The TVC generates the timing information with pre-charging and discharging of $C_{TINT}$. The complementary inputs $V_{ENB}$ and $V_{EN}$ are used to steer the current of $M_1$, from $M_2$ to $M_3$, and to return it to $M_2$. After fully pre-charging the integration capacitor ($C_{TINT}$) into VDDA while $V_{ENB}$ is high, the TVC waits for $V_{STOP}$ from TC while $V_{EN}$ is high. When $V_{STOP}$ is triggered, $V_{EN}$ becomes low from NANDing with $V_{STOP}$ and $V_{ENB}$. The output of TVC ($V_{OTVC}$) is proportional to the time of discharging, as in the following expression:

##### (5)
$\Delta\mathrm{V}_{\text{OTVC}}\cong \frac{\mathrm{I}_{\mathrm{TV}}}{\mathrm{C}_{\text{TINT}}}\times \Delta \mathrm{t}$

where $Δt$ is the time interval being measured. $C_{TINT}$ is implemented as a metal-insulator-metal (MIM) capacitor. The nominal values for ITV and $C_{TINT}$ are 1.2 μA and 173 fF, respectively. The TVC can measure the time intervals over a linear range of 15 ns-70 ns. Without any fabrication problem, the main leakage source during the operation of TVC could be the off leakage of $M_3$ and $M_4$. After the pre-charging operation of $C_{TINT}$ to VDDA while $M_2$ and $M_4$ are on, discharging of $C_{TINT}$ starts when $M_3$ is on until $V_{STOP}$ becomes high. Even though the off leakage of $M_4$ could be induced in $C_{TINT}$ during the discharging operation, it would be quite linear proportional to the time of the discharging operation as a result of the response linearity in Fig. 11.

Fig. 6. Microphotograph of prototype chip.

Fig. 7. (a) TCA-COB schematic, (b) measurement setup for electrical pulse response

### 4. Over Current Protector

To protect the prototype chip from being damaged by an over photocurrent, the simple and effective over current protector (OCP) [14] is adopted in the input node of TCA as shown in Fig. 2. Because the prototype chip is powered from a 1.8 V supply, considering of DC operating point, the OCP is designed to work when the source voltage of $M_6$ is larger than 1.7 V, and the size ratios of $M_6$ and $M_7$ are designed to sink by several mA. In the ideal case, $M_6$ is fully turned off during normal operation of the receiver. However, the leakage of $M_6$ should be considered as a real design issue. In order to minimize the leakage for the linear response of the receiver, we have chosen the source voltage of $M_6$ and the size ratio of $M_6$ and $M_7$ as specified above.

Fig. 8. Simulated and measured transimpedance frequency response.

Fig. 9. Measured electrical pulse response result.

## IV. MEASUREMENT RESULTS

The chip microphotographs of the prototype are shown in Fig. 6. The prototype LADAR receiver was fabricated in a standard 0.18-μm CMOS process as two patterned chips: one is for measuring the TCA performance (chip#1) and the other is for measuring the TOF performance of the prototype (chip#2). The prototype chip was implemented in 750 μm × 750 μm, including peripheral circuitry and I/O pads. Considering the flip-chip bonding feature of the FPA-based LADAR structure [14,19] the core blocks of TCA, TC, and TVC were implemented in an area of 100 μm × 100 μm.

Fig. 10. (a) measured RMS output noise of 4-to-1 TCA, (b) oscilloscope.

Fig. 11. Measured output voltage of TVC vs. TOF.

For facilitating the electrical pulse response measurements, the fabricated chip was mounted on a wire-bonded chip-on-board (COB) module, as shown in Fig. 7(a). The external total capacitor ($C_{EXP}$) of 6 pF is used for the modeling of the photodetector. Each input channel of the TCA is connected to the four $C_{EXP}$s of 1.25 pF each by applying the proposed pixel combining readout scheme. Here, a 10 kΩ resistor acts as a voltage-to-current converter. To measure the transient response of the fabricated circuit, an electrical pulse signal generated by an Agilent 81110A pattern generator was applied to each input channel through four 10 kΩ resistors of the implemented test fixture, as shown in Fig. 7(b). The OUT signal was measured using a Rohde & Schwarz RTO2024 oscilloscope. Short electrical pulse response measurements were performed using coaxial micro-plugs (CMP) and receptacle (CMJ) connectors.

Table 1. Performance Comparison

 This work [26] [14] [18] [27] [21] [28] [20] [29] Type Integrated Integrated Integrated Integrated Integrated Integrated Integrated Integrated Hybrid CMOS Technology (μm) 0.18 0.18 0.18 0.18 0.18 0.18 HV 0.18 0.18 N/A PD Type Modeling InGaAs APD InGaAs APD InGaAs APD InGaAs PIN InGaAs APD InGaAs APD Modeling InGaAs APD $C_{PD}$ (pF) 6 1.2 1 0.5 0.5 8 1.5 4 < 5 Pulse specification (ns) 5 2 5 5 4 3.8 0.1 2.2 10~28 Measurement type Electrical Optical Optical Optical Optical Optical Optical Electrical Optical Transimpedance gain (dB·Ω) 67.6 100 76 106 76.3 70 87.9 67.5 87 Bandwidth (MHz) 310 450 530 150 720 185 700 350 N/A MDS (mV) 2.6 18.1 7.3 5.2 7 4.5 36.9 1.1 N/A Input referred noise (pA/√Hz) 4.71 2.59 4.48 4.55 6.3 15.4 17 3.8 N/A Power (mW) 37.4 422.4 430 165 29.8 41 180 17.8 420 Chip size ($mm^2$) 0.75×0.75 4.8×0.85 2.2×2.2 0.95×0.95 1.1×0.25 0.9×1.0 2.0×2.0 1.0×0.8 N/A

The frequency response of the implemented TCA is measured via S21, as shown in Fig. 8. The S21 is measured from 10 MHz to 10 GHz using Keysight’s PNA network analyzer N5224A, as in [21,22]. The measured -3 dB bandwidth is approximately 310 MHz, which is 10 MHz larger than the simulated bandwidth of 300 MHz, and the measured gain is approximately 67 dB.

Fig. 9 shows the measured transient pulse responses for each input of the 4-to-1 TCA in the fabricated prototype chip where the pulse response phase is shifted by 180 degrees via the output buffer. The pulse magnitude of the input signal from the pattern generator is adjusted so that the input current is 5 μA and the pulse width of the input signal is 5 ns with a rise time of 1 ns. Considering its measured output voltage amplitude as approximately 12 mV, the gain is calculated as 67.6 dB, which is similar to the measured gain as shown in Fig. 8.

The integrated output noise of the 4-to-1 TCA was measured using the oscilloscope RMS calculation with no input signal source, as in [20-22]. As shown in Fig. 10, the standard deviation of the TCA output was measured to be 0.799 $mV_{rms}$. After subtracting the inherent oscilloscope noise of 0.161 $mV_{rms}$, the corrected output noise of the TCA was estimated to be 0.783 $mV_{rms}$. With this result, the minimum detectable signal (MDS) of the TCA was estimated to be approximately 2.6 $mV_{rms}$ when the signal to noise ratio (SNR) is 3.3. The integrated input-referred noise of the 4-to-1 TCA for each input can be calculated to be approximately 81.6 $nA_{rms}$, as in [25]. Because the measured transimpedance gain of the TCA is approximately 67.6 dBΩ, the average input-referred noise current density is 4.71 pA/√Hz.

The measured power consumption of the entire prototype chip was approximately 37.4 mW including the output buffer with a supply voltage of 1.8 V. Approximately 18.1 mW was consumed by the TCA, TC, and TVC.

The linearity of the prototype chip was measured in the electrical response test as shown in Fig. 7. We assumed that the time interval of triggering the electrical pulse is the same as the time-of-flight (TOF) information in the receiver. To verify the linear response of the prototype chip, the time interval of the electrical pulse input was swept from 10 ns to 90 ns with a minimum step of 10ns, and the TVC output ($V_{OTVC}$) was measured as shown in Fig. 11. The maximum output voltage swing was measured to be approximately 500 $mV_{PP}$. Comparing with ideal linear fit, the maximum non-linearity error of the prototype chip was calculated to be approximately 1.1% of the full scale. With a large $C_{PD}$ of 6 pF and a rise time of 1 ns, a TOF non-linearity of 1.1% without any calibration techniques is quite competitive.

Table 1 summarizes the performance of the prototype LADAR receiver with the proposed readout scheme compared with recently published works and commercial products. Note that the MDS is normalized with an SNR of 3.3 for the right comparison. The prototype LADAR receiver shows competitive performances compared to single channel receivers with large $C_{PD}$s. This implies that the proposed LADAR receiver is suitable for large area photodetectors, resulting in high sensitivity and accurate TOF readouts. In the next step of this work, the fully differential TIA structure would be implemented to improve common-mode rejection ratio (CMRR). The noise performance would be improved with high CMRR, even if it is hard to integrate the fully differential TIA structure in fixed APD size (commonly under 100 $um^2$) as flip-chip bonded architecture in FPA-based LADARs.

## V. CONCLUSION

This work introduces an FPA-based LADAR receiver with a pixel combining readout scheme for high sensitivity and accurate range information. The proposed readout scheme effectively increases the sensitivity without the bandwidth limitation of traditional architectures while maintaining the accurate ranging of the LADAR receiver. The proposed readout scheme is a promising solution for high sensitivity ranging image sensors.

### ACKNOWLEDGMENTS

This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. NRF-2019R1A2C1004805).

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## Author

##### Hyeon-June Kim

Hyeon-June Kim received the M.S. and Ph.D. degrees from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2012 and in 2017, respectively, all in Electrical Engineering.

Currently, he is working in CIS Development Division, SK Hynix, Icheon, South Korea.

His interests include mixed-signal IC design, sensor applications including imaging systems and LADAR systems, and next-generation memory.

Dr. Kim received a Qualcomm Innovation Award and a bronze prize in Samsung Electro-mechanics Award in 2016.

##### Eun-Gyu Lee

Eun-Gyu Lee received the M.S. degrees from Pohang University of Science and Technology (POSTECH), Pohang, Korea, in 2006. She received the Ph.D. degree from CNU in 2017.

She was a researcher with RFPIA.inc, Daejeon, South Korea, from 2017 to 2018. She is currently Postdoctoral Researcher of the Department of Electronics Engineering, CNU.

Her research interests include readout integrated circuits and systems for LADAR applications, and RF/mm-wave integrated circuits and systems for phased-array applications.

##### Choul-Young Kim

Choul-Young Kim received his MS and Ph.D. degrees from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Rep. of Korea, in 2004 and 2008, respectively.

From March 2009 to February 2011, he was a postdoctoral research fellow at the Department of Electrical and Computer Engineering, University of California, San Diego, USA.

Currently, he is working an assistant professor of electronics engineering at CNU.

His research interests include RF/mm-wave integrated circuits and systems for short-range radar and phased-array antenna applications, and analog front-end readout integrated circuits for LADAR applications.