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Title A 12-Gb/s Continuous-time Linear Equalizer with Offset Canceller
Authors 임백진(Baekjin Lim) ; 유창식(Changsik Yoo)
DOI https://doi.org/10.5573/JSTS.2019.19.2.220
Page pp.220-225
ISSN 1598-1657
Keywords Continuous-time linear equalizer(CTLE) ; offset cancellation ; chopping ; pulse width modulation(PWM) ; CMOS
Abstract A DC-offset of a continuous-time linear equalizer (CTLE) is cancelled by an analog offset canceller (OFC). The bandwidth (BW) of the OFC is designed to be 10-kHz not to affect the received signal integrity. The BW of the OFC set by an active-RC integrator is lowered by increasing the effective resistance through pulse width modulation (PWM). The input offset of the OFC itself is removed by employing chopping technique. The offset-cancelled CTLE is applied to a four-channel 12-Gb/s wireline receiver compliant with the high-definition multimedia interface (HDMI) version 2.1 standard. The 12-Gb/s wireline receiver has been implemented in a 28-nm CMOS process. The eye opening for the bit-error rate (BER) smaller than 10-12 becomes larger than 0.26 unit-interval (UI) with the OFC while the BER is always larger than 10-12 without the OFC.