I. INTRODUCTION

Since the initial commercial introduction of three-dimensional (3D) NAND Flash memory, vertical NAND Flash memory production has experienced remarkable growth, firmly establishing itself as the dominant data storage solution across a wide array of applications ^[1-4]. The emergence of 3D vertical NAND Flash memory has marked a pivotal development, addressing the limited scalability of two-dimensional (2D) NAND Flash memory. Consequently, the continuous stacking of 3D NAND Flash memory is poised to surpass 200 stacks in the near future, revolutionizing data storage capabilities ^[5-9]. However, as the stacking height increases, the challenge of maintaining precise control over channel hole dry etching intensifies. This has given rise to tapering issues, characterized by differential etching at the top and bottom of the process, posing a significant obstacle in achieving a perfectly circular profile during the etching process. In light of these intricate challenges, it is imperative to underscore the significance of program speed, which plays a pivotal role in optimizing the performance and efficiency of 3D NAND Flash memories. The program speed dictates how rapidly data can be written to memory cells and directly affects the overall efficiency and responsiveness of the storage device ^[10-15]. Therefore, this research extends its focus beyond the analysis of cell current degradation in 3D NAND Flash memory to the realm of program speed. To enhance the flexibility of the investigation, a conventional 2D NAND structure was ingeniously transformed into a cylindrical structure, providing a versatile platform for experimentation with various channel designs ^[16-20].

II. SIMULATION

Fig. 1(a) shows a schematic diagram of 3D NAND Flash Memory and the cross-sectional to channel profile of select word-lines (WLs) on 3D NAND flash memory, which consists of four types of circles, ellipses, spikes, and double-spike designed in technology computer-aided design (TCAD). The WL stack consisted of seven layers structured with alternating oxides and nitrides, with each layer being 30 nm thick. The holes were fabricated using a plug etch process and an oxide-nitride-oxide-polysilicon (ONOP) deposition process. The detailed fabrication process is as follows. Selective etching was carefully performed to remove the nitride layer to give a shape to the WL, followed by the detailed deposition of the tunnel oxide, charge trap nitride, and blocking oxide layers to improve the structural integrity of the memory cell. This process was performed using the sentaurus process in the simulation. Finally, control gates were fabricated to provide a means of manipulating charge storage and recovery mechanisms within the NAND Flash memory. The detailed specifications are listed in Table 1. In each channel profile, a step-by-step program, V$_{th}$ was used to examine, the properties of the E-Field of the tunneling oxide.

Fig. 2 shows the step-by-step programmed I$_{D}$-V$_{G}$ curves for each channel profile of select WLs in 3D NAND Flash Memory. For (a) circle, (b) ellipse, (c) spike and (d) double-spike profile, the selected WL was programmed within a voltage range of 12-18V, just before reaching the saturation region, while V$_{\mathrm{PASS}}$ was consistently applied at 6 V in the unselected WL. Notably, each channel profile exhibited variations in the E-field applied to the tunneling oxide when a programmed voltage was applied, resulting in distinct distributions of trapped electrons within the nitride layer. Consequently, as the devices were programmed from their initial states to 18 V, the V$_{th}$ differences vary depending on their structural characteristics. The V$_{th}$ difference is most pronounced for the spike profile, measured at 3.3 V. It is followed by the double-spike profile at 2.34 V, the ellipse profile at 1.79 V, and the circle profile at 1.7 V.

Fig. 1. (a) Schematic diagram of 3D NAND Flash Memory string and cross-sectional to channel profile of select WLs in 3D NAND Flash Memory; (b) circle; (c) ellipse; (d) spike; (e) double-spike Schematic of 3D NAND flash memory string.

Fig. 2. Step-by-step programmed ID-VGcurves for each channel profile of the selected WL in 3D NAND flash memory: (a) circle; (b) ellipse; (c) spike; (d) double-spike.

III. RESULT AND DISCUSSIONS

Fig. 3 shows the E-field distribution along the cut-line in the circle and ellipse profiles at two regions—}the ``A'' and ``B'' cut lines at V$_{\mathrm{PGM}}$=18 V. The application of the programmed voltage results in a direct relationship between the E-field within the tunneling oxide, the number of trapped electrons in the nitride, and the resulting increase in V$_{th}$. Fig. 3(a) shows that the E-field is notably concentrated along the ``A'' cut-line of the ellipse profile when compared to the circle profile. Conversely, in Fig. 3(b), the E-field along the cut-line diminishes within the area adjacent to the ``A'' cut-line when compared to the circle profile. The ellipse profile exhibits the highest E-field concentration in the ``A'' cut-line with the largest radius of curvature, while the adjacent region displays a relatively lower E-field. Consequently, the average E-field within the circle profile closely mirrors that of the ellipse profile because the overall E-field application remains similar despite variations in the E-field distribution ^[21,22].

Fig. 4 shows the E-field distribution along the cut line in the spike and double-spike profiles at V$_{\mathrm{PGM}}$=18V (a) a sharp protrusion region in the spike and double-spike profiles, (b) a sharp protrusion region corresponding to the double-spike profile and (c) a region adjacent to the sharp protrusion. The V$_{\mathrm{PGM}}$ leads to a notable relationship between the E-field within the tunneling oxide, accumulation of electrons in the nitride layer, and subsequent elevation of V$_{th}$. In Fig. 4(a), the E-field distribution along the cut line in the tunneling oxide is distinctly concentrated at the sharp protrusion of the spike profile compared with the double-spike profile. This is because, at the same program voltage of 18 V, the spike profile has a larger V$_{th}$ than the double-spike profile, resulting in a higher E-field in the tunneling oxide. Conversely, the sharp protrusion region specific to the double- spike profile in Fig. 4(b) indicates a larger E-field within the tunneling oxide compared to the spike profile without the sharp protrusion region. Additionally, the E-field was marginally greater within the spike profile in the region where neither the spike profile nor the double-spike profile corresponded to a sharp protrusion, as shown in Fig. 4(c). This is because the E-fields are all concentrated at the sharp protrusions in the double-spike profile and the E-fields in the adjacent regions are less than those in the spike profile. Consequently, a stronger E-field was applied to the tunneling oxide of the spike profile.

Fig. 5 shows the V$_{th}$ slope according to the E-field of the tunneling oxide when a programmed voltage is applied to each channel profile. It is evident that the E-field is most pronounced in the spike profile and least pronounced in the circular profile when a programmed voltage is applied before reaching the saturation region. V$_{th}$ increased as the E-field of the tunneling oxide increased during the program operation of each channel profile. Therefore, the V$_{th}$ slope as a function of the program voltage and E-field shows the following order: spike profile {\textgreater} double-spike profile {\textgreater} ellipse profile {\textgreater} circle profile. The results showed direct correlation between the application of an increased E-field to the tunneling oxide, enhanced electron trapping in the nitride, and an increase in V$_{th}$.

Fig. 3. E-field distribution along the cut-line in circle and ellipse profiles at VPGM=18 V: (a) "A" cut-line; (b) "B" cut-line.

Fig. 4. E-field distribution along cut-line in the spike and double spike profiles at VPGM=18 V: (a) sharp protrusion region in the spike and double spike profiles; (b) sharp protrusion region corresponding to the double spike profile; (c) region adjacent to the sharp protrusion.

Fig. 5. Vthslope according to the E-field of tunneling oxide when program voltage is applied in each channel profile.

IV. CONCLUSIONS

This study investigated the channel profile and program speed dynamics within non-ideal vertical 3D NAND Flash Memory using advanced 3D TCAD simulations. The application of the programmed voltage revealed a direct link between the E-field within the tunneling oxide, electron trapping in the nitride layer, and subsequent V$_{th}$ elevation. Different channel profiles yield varying E-field concentrations, which affect the V$_{th}$ values. Each channel profile exhibits distinct E-field distributions within the tunneling oxide when exposed to a programmed voltage. The observed E-field trends aligned closely with V$_{th}$ variations as a function of program voltage. Higher E-field application within the tunneling oxide corresponded to elevated V$_{th}$ values, reaffirming the interplay between the E-field, electron trapping, and V$_{th}$. This study underscores the significance of channel profiles in dictating the E-field distribution and, consequently, the performance of 3D NAND Flash Memory.