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Title A Multi-Band CMOS Frequency Divider Integrated Circuit
Authors (Young Gi Kim) ; (Sung Hoon Bae) ; (Bo-Seong Kang) ; (Hyeong Jun Jang) ; (Jae-Yeon Hwang) ; (Patrick Roblin)
DOI https://doi.org/10.5573/JSTS.2025.25.2.176
Page pp.176-183
ISSN 1598-1657
Keywords Frequency divider; injection locked frequency divider; ring oscillator; injection-locked oscillator
Abstract This paper presents a 65 nm CMOS divider circuit that (1) operates as a divider with a division ratio of 64 based on digital logic when the DC supply voltage is low and (2) operates as a multi-band injection-locked frequency divider (ILFD) with a unique division ratio for each band of operation when the supply voltage is high.
The proposed divider consists of a six-stage cascade of current-mode logic (CML) dividers with buffer circuits.
The frequency span of operation in the ILFD mode is divided into 7 sub-bands from 2 to 27 GHz depending on the supply voltage. The proposed circuit demonstrates a record 528 ILFD division ratio with a low power consumption of 0.926 mW, which is the best performance reported so far in the literature. A phase noise of-102.27 dBc is measured at 100 kHz offset for a 27.113 GHz input signal