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The Journal of Semiconductor Technology and Science (JSTS) is an international, peer-reviewed, and open-access journal that is published bimonthly.
- Scope: semiconductor processes, devices, circuits, and MEMS.
- Editor-in-Chief: Prof. Woo Young Choi (ECE, Seoul National University)
- Indexed within Science Citation Index Expanded (SCIE), SCOPUS, Korea Citation Index (KCI), and other databases.

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Title Suppression of Interference Characteristics in 3D Vertical DRAM
Authors (Myung-Hyun Baek)
DOI https://doi.org/10.5573/JSTS.2025.25.2.134
Page pp.134-141
ISSN 1598-1657
Keywords DRAM; pass gate effect (PGE); gate-induced drain leakage (GIDL); vertical DRAM
Abstract With the growing demand for faster data processing and enhanced computational performance, DRAM technology faces increasing challenges as cell dimensions shrink below 10 nm. This study focuses on two critical phenomena in vertical DRAM structures: the Pass Gate Effect (PGE) and Gate-Induced Drain Leakage (GIDL).
We perform comprehensive 2D Technology Computer-Aided Design (TCAD) simulations to analyze the impact of aggressor cell activation on victim cell barrier modulation. Additionally, we investigate the effect of floating body structure on GIDL. Our results indicate that the absence of a Back Gate (BG) significantly exacerbates PGE, while integrating a BG effectively suppresses this effect. These results emphasize the importance of the BG in mitigating inter-cell interference and improving the overall performance of DRAM.