I. INTRODUCTION

Metal-oxide-semiconductor field-effect transistors (MOSFETs) have played a central role in electronics for decades, thanks to their excellent switching capabilities ^{[1- 4]}. Additionally, their outstanding current drivability enables MOSFETs to efficiently power components such as displays, engines, audio systems, and high-frequency circuits, making them essential in both digital and analog applications ^{[5- 8]}. Especially, p-channel MOSFETs with their excellent pull-up characteristics and low leakage current have been widely used as driving transistors ^{[9- 18]}. Recently, p-channel MOSFETs have also gained attention as driving transistors in organic light emitting diode on silicon (OLEDoS), where precise, low-current control is essential ^{[19- 22]}.

For driving transistors, particularly in high-voltage applications using high-side p-channel MOSFETs such as DC/DC converters, power inverters and LEDs ^{[11- 18]}, long-channel devices are primarily used to enhance reliability ^{[13, 14]}. Also, long-channel p-channel MOSFETs are used for OLEDoS driving transistors to effectively manage the data range ^{[23- 25]}.

However, high-side p-channel MOSFETs, when in the off-state operation, experience high drain-source voltage ($V_{DS}$), leading to strong lateral electric fields ^{[15- 17]}. Similarly, in OLEDoS applications, driving transistors primarily operate in the subthreshold region for precise pixel brightness control, which also results in a high $V_{DS}$ ^{[19- 21]}. These high $V_{DS}$ conditions cause hot-carrier-induced degradation (HCD), which presents a severe reliability issue ^{[26- 30]}. The HCD leads to problems such as threshold voltage ($V_T$) shifts, degraded swing performance, and increased leakage current, which can negatively impact driving performance and increase power consumption. Thus, it is essential to predict the lifetime and assess HCD accurately to ensure reliability in these applications.

While research on hot carrier lifetime has been actively conducted in the inversion region ^{[31- 37]}, few studies in the subthreshold region have investigated hot carrier lifetime, with existing research primarily focusing on the mechanisms of degradation in the non-equilibrium states of short-channel devices ^{[46- 48]}. It is because of the extremely low subthreshold current of p-channel MOSFETs in the subthreshold region, which makes detecting any degradation caused by HCD.

In this study, we propose a novel method of predicting the hot carrier lifetime based on the energy of secondary hot electrons, which are the primary factor contributing to degradation in p-channel MOSFETs, using both experimental measurements and technology computer-aided design (TCAD) simulations. By simultaneously increasing gate ($V_G$) and drain ($V_D$) voltage while preserving the gate-drain voltage ($V_{GD}$), it was confirmed that the energy of the secondary hot electron is maintained while only the number of carriers increases. This proposed method successfully achieves acceleration in the subthreshold region, enhancing HCD and enabling lifetime prediction for long-channel p-channel MOSFETs.

II. DEVICE STRUCTURE, MEASUREMENT AND SIMULATION SETUP

In this paper, long-channel p-channel MOSFETs for driving transistors are measured and calibrated using TCAD simulations, as shown in Fig. 1. The channel length ($L_{ch}$), width, and gate insulator thickness ($T_{ins}$) are 3 $\mu\text{m}$, 0.33 $\mu\text{m}$, and 10.5 nm, respectively. For the analysis of HCD in the p-channel MOSFETs, the experimental data were measured by a Keysight B1500A semiconductor device analyzer. Referring to the experimental data, TCAD simulations were performed using dynamic non-local band-to-band tunneling, Shockley-Read-Hall recombination, Auger recombination, the van Overstraeten-de Man impact ionization model, the Philips unified mobility model, and the Fermi distribution ^[40]. The spherical harmonic expansion of the Boltzmann transport equation (SHE-BTE) was used to calculate the detailed non-local carrier energy and carrier distribution ^[41]. As shown in Fig. 1(a), the transfer characteristics of p-channel MOSFETs under the subthreshold condition are measured. During the subthreshold operation at $V_G = -0.7\text{ V}$, $V_D = -6\text{ V}$ condition, measured subthreshold current is only $\sim$1.2 pA, which is approximately $10^5\times$ lower than the on current at $V_G = -1.5\text{ V}$ and $V_D = -6\text{ V}$ condition. Consequently, the lifetime prediction for HCD is challenging due to low subthreshold current when p-channel MOSFETs used as driving transistors operate in the subthreshold region.

Fig. 1. (a) Device structure and transfer curves of the p-channel MOSFETs with measurement and simulation. (b) Measured substrate and gate current (ISub and IG) normalized by the source current (IS) with the variation of gate and drain voltage (VG and VD). A body voltage (VB) of 0 V is applied to all stress and measurement conditions.

III. HOT-CARRIER-INDUCED DEGRADATION OF P-CHANNEL MOSFETS OPERATING IN THE SUBTHRESHOLD REGION

As demonstrated in numerous previous experimental studies, in p-channel MOSFETs, the hot electrons generated by impact ionization play a more dominant role than hot holes in device degradation, due to the higher $\text{Si-SiO}_2$ energy barrier for holes ^{[33- 39]}. These hot electrons are generally referred to as secondary hot electrons, as they are not directly accelerated from the channel but are generated through an impact ionization process triggered by energetic hot holes near the drain-side high-field region. In contrast, the first hot electrons are those directly accelerated minority carriers under high lateral electric field near the drain, which are negligible due to their low density. Another contributing factor to the dominance of electron trapping in p-channel MOSFETs is the vertical electric field, with the applied voltage ($V_G > V_D$) being favorable for electron injection in the oxide. As shown in Fig. 1(b), the secondary hot electron injection is the primary contributor to gate leakage current, as both substrate current ($I_{Sub}$) normalized by source current ($I_S$) and gate current ($I_G$) normalized by $I_S$ reach a maximum at low gate voltages. It is because a high $V_{GD}$ induced by low $V_G$ is a secondary hot electron injection maximum condition. Fig. 2 shows the comparison of HCD evaluation in both the subthreshold and the inversion regions, conducted under the same $V_{GD}$ while increasing $V_G$ and $V_D$ for comparison. Unlike the inversion operation, which shows a positive $V_T$ shift of 5.0 mV due to electron trapping, the subthreshold operation exhibits barely detectable degradation of $V_T$ due to the insufficient number of carriers. These factors contribute to the challenges of accurately predicting lifetime in the subthreshold region.

Fig. 2. Experimental transfer characteristics after HCD in (a) subthreshold operation (VG = −0.7 V, VD = −8.7 V) and (b) inversion operation (VG = −1.5 V, VD = −9.5 V). The HCD stress evaluation was conducted for 10,000-s stress time at 25 ◦C.

IV. TIME ACCELERATION METHOD USING SOURCE CURRENT

Fig. 3 illustrates the concept of the proposed time acceleration method for the HCD in p-channel MOSFETs. For the acceleration of HCD in the subthreshold region, a novel method is applied by simultaneously increasing $V_G$ and $V_D$ while maintaining a constant $V_{GD}$, resulting in an increase only in the $I_S$. As shown in Fig. 3, maintaining the same $V_{GD}$ ensures that the lateral and vertical electric fields ($E_Y$ and $E_X$) remain constant, allowing only an increase of the carrier density in the channel without changing the generation rate of secondary hot electrons. Thus, if $I_S$ increases by $\sim$$10^5\times$, the HCD resulting from subthreshold operation is also accelerated by $\sim$$10^5\times$. This method maximizes the hole concentration in the channel by converting the operational mode of the p-channel MOSFET from the subthreshold to the inversion region, as shown in Fig. 4. For instance, $I_S$ at $V_G = -1.5\text{ V}$ is approximately $1.23\times 10^5\times$ higher than that at $V_G = -0.7\text{ V}$, meaning that a 1-s HCD evaluation at -1.5 V produces the same effect as a $1.23\times 10^5\text{-s}$ HCD evaluation at $-0.7\text{ V}$.

Fig. 3. Conceptual view of the time acceleration method based on IS modulation. The HCD in (a) conventional and (b) time-accelerated subthreshold operation. It assumes a scenario where on-current increases by ~105× with higher VG and VD while maintaining constant VGD. Since the number of carriers has increased by ~105×, the time flow is also accelerated by ~105×.

Fig. 4. Experimental IS at gate voltages of −0.7 V, −1.5 V, −1.75 V, −2 V, −2.25 V, −2.5 V, −2.75 V, and −3 V, with a constant VGD of 8 V.

Fig. 5 shows the measured $I_{Sub}$ and $I_G$ normalized by $I_S$ which indicate the impact ionization and HCD in gate oxide normalized by the initial number of carriers in channel, respectively. It is notable that the normalized $I_{Sub}$ and $I_G$ values remain consistent under the same $V_{GD}$ condition, even as $V_G$ and $V_D$ increase. It indicates that with $V_{GD}$ maintained scheme, the amount of hot carrier generation and the extent of degradation affecting the gate oxide remain stable, aside from the increase in $I_S$.

Fig. 5. Experimental (a) ISub and (b) IG normalized by the IS in p-channel MOSFETs. The electrical parameters are extracted under VGD conditions of 5 V, 6 V, 7 V, and 8 V, while varying the gate voltages.

To investigate the ideality of $I_S$ modulation for HCD acceleration, TCAD simulations were performed to verify the electrical characteristics under the accelerated conditions. As shown in Figs. 6(a) and 6(b), the lateral and vertical electric fields ($E_Y$ and $E_X$) in the channel is closely the same, whether in the subthreshold or the inversion region, which indicates the local conditions of the carriers in the channel are maintained even in the accelerated condition. Owing to the long-channel device characteristics, the electron energy also becomes constant as depicted in Fig. 6(c) ^{[42- 45]}. However, as shown in Fig. 6(d), only the hole current density in the channel increases exponentially during the accelerated operation compared to the conventional subthreshold operation, which demonstrates the feasibility of the proposed acceleration method.

Fig. 6. Simulated electrical characteristics contributing to the HCD in p-channel MOSFETs. (a) lateral (Y-axis) electric field, (b) vertical (X-axis) electric field, (c) electron energy, (d) hole current density in channel region. The conventional subthreshold region operation (red), the 1.23×105-times accelerated operation (blue), and 2.54 × 105-times accelerated operation (green) are illustrated. The measurements are conducted in constant VGD = 8 V and VS = 0 V condition.

Fig. 7. Simulated normalized electron distribution obtained using the SHE-BTE model in the channel at the maximum electron energy position which is 140 nm away from the drain junction in p-channel MOSFETs. Distribution is normalized by the electron density of p-channel MOSFETs.

As illustrated in Fig. 6(c), the electron energy reaches its maximum not at the drain junction but at a location approximately 140 nm away from it. This occurs because the secondary electrons generated by impact ionization require a finite distance to be accelerated by the lateral electric field before attaining maximum energy. The non-local carrier energy and carrier distribution at the location of the peak electron energy are calculated using the SHE-BTE model under the accelerated conditions, as shown in Fig. 7. The distribution is normalized by the electron density, and the results exhibit close similarity under the same $V_{GD}$. Thus, no additional effects are observed beyond the increase in carrier concentration, even when non-local conditions are assumed.

Fig. 8(a) shows the results of HCD evaluation with the proposed acceleration method. It can be confirmed that the $V_T$ shift follows a power law relationship with time, as observed in previous studies ^{[31- 37]}. Assuming $I_S$ at $V_G = -1.5\text{ V}$ is set as the reference, the $I_S$ ratios for $V_G = -2\text{ V}$, $-2.5\text{ V}$, and $-3\text{ V}$ are 4.2, 9.7, and 17.9, respectively. Thus, by applying the $I_S$ ratio to the conventional power law model, time acceleration proportional to the $I_S$ ratio can be achieved, as follows:

Fig. 8. Experimental VT shift due to the HCD of p-channel MOSFETs as a function of (a) the accelerated stress time and (b) the IS-ratio-calibrated stress time. The devices are stressed at VGD = 8 V and VG = −1.5 V, −2 V, −2.5 V, and −3 V.

Fig. 9. Experimental VT shift by the HCD in p-channel MOSFETs at various VGD of 8 V, 7 V, and 6 V.

Fig. 8(b) indicates the feasibility of time acceleration, showing the results of a 20,000-s stress test at $V_G = -1.5\text{ V}$ by using the stress time calibrated referring to the data at $V_G = -2\text{ V}$ (4.2$\times$ acceleration), $-2.5\text{ V}$ (9.7$\times$ acceleration), and $-3\text{ V}$ (17.9$\times$ acceleration). As expected, our proposed time acceleration was successfully confirmed under all the measured $V_G$ conditions. Fig. 9 shows that the proposed acceleration method is valid under various $V_{GD}$ conditions.

V. LIFETIME PREDICTION IN THE SUBTHRESHOLD REGION

In the previous sections, it was confirmed that p-channel MOSFETs can achieve quantitative time acceleration by using $I_S$ modulation. In this section, a method for hot carrier lifetime prediction is proposed based on the described time acceleration approach, as follows:

Fig. 10. Experimental lifetime vs. 1/IS for p-channel MOSFETs. The lifetime in the subthreshold region at VG = −0.7 V (red) was predicted based on the lifetime at VG = −1.5 V (blue). A lifetime is defined by a 10-mV shift in VT. Points at VG = −1.75 V, −2 V, −2.25 V, −2.5 V, and −3 V are shown in white circle to indicate estimated experimental data.

As shown in Eq. (3), the product of lifetime and the $I_S$ ratio remain constant because the $V_T$ shift for failure is fixed at 10 mV. When taking the logarithm, it can be represented as a linear function with a slope of 1, as shown in Eq. (4). Fig. 10 shows the experimental data for lifetime and $1/I_S$ for $V_G = -1.5\text{ V}$, $-1.75\text{ V}$, $-2\text{ V}$, $-2.25\text{ V}$, $-2.5\text{ V}$, and $-3\text{ V}$. It can be observed that each point has a slope of 1 in the linear function, indicating that the lifetime is proportional to the inverse of the $I_S$ ratio. In the subthreshold region at $V_G = -0.7\text{ V}$, $I_S$ was reduced by $1.23\times 10^5\times$ compared to the reference $I_S$ at $V_G = -1.5\text{ V}$, indicating that the lifetime can be similarly predicted based on this $I_S$ ratio. Consequently, the hot carrier lifetime in the subthreshold region is marked with red circular symbols in Fig. 10, with a predicted lifetime of $2.90\times 10^{12}\text{ s}$. Due to physical variability in $V_T$ shift mechanisms such as interface trap generation or charge trapping, as well as device-to-device variation in parameters like doping and oxide thickness, the constant term in Eqs. (3) and (4) may deviate, resulting in prediction error. However, this uncertainty can be reduced by incorporating additional reference data obtained under a wider range of $I_S$ conditions.

VI. CONCLUSIONS

This work confirmed a novel method of predicting the hot carrier lifetime of long-channel p-channel MOSFETs under the subthreshold condition through quantitative acceleration. The proposed method proves that maintaining $V_{GD}$ while increasing $V_G$ and $V_D$ results in only an increase in the number of carriers without changing the energy of secondary hot electrons, which are the primary degradation factor in p-channel MOSFETs. By overcoming the challenges caused by low subthreshold current, which makes detecting degradation difficult, this study offers a reliable approach of predicting hot carrier lifetime in the subthreshold region.