| Title |
Optimization of 28 nm FDSOI CMOS Inverter Design Using Deep Learning Algorithm |
| Authors |
(Tae Young Yoon) ; (Kang Hee Lee) ; (Jun Seok Lee) ; (Mincheol Kim) ; (Yongyoon Choi) ; (Jang Hyun Kim) |
| DOI |
https://doi.org/10.5573/JSTS.2026.26.4.249 |
| Keywords |
CMOS inverter; optimization; deep learning algorithm; neural network; TCAD |
| Abstract |
The Complementary Metal Oxide Semiconductor (CMOS) inverter is a fundamental digital circuit in the semiconductor industry due to its low power consumption and high-speed performance. Especially, fully depleted silicon-on-insulator (FDSOI) devices provide significant advantages in low power consumption and process simplicity. To optimize this CMOS inverter for various environments, Technology Computer Aided Design (TCAD) simulation is utilized since multiple factors need to be considered. However, optimization of numerous factors is inefficient due to its repeatability and restricted computing resources. In this work, a novel approach to CMOS inverter optimization is proposed applying the Deep Learning (DL) algorithm which consists of neural network for an efficiency. To optimize the DL model for CMOS inverter data, we iteratively refined the model based on metrics such as Mean Squared Error (MSE), Mean Absolute Error (MAE), etc. As a result, we obtain a model with a low error rate while avoiding overfitting. Using this optimized DL model, we perform the optimization process and identify an optimal point where delay time is improved by 69.4% and power loss by 71.4% compared to the reference device. |