| Title |
HLS-based HW/SW Co-design and Hybrid HLS-RTL Design for Post-Quantum Cryptosystem |
| Authors |
(Chang-Hyeon Lee) ; (Jae-Hyeok Lee) ; (Haesung Jung) ; (Hanyoung Lee) ; (Hanho Lee) |
| DOI |
https://doi.org/10.5573/JSTS.2024.24.3.191 |
| Keywords |
Post-quantum cryptography; high-level synthesis; HW/SW co-design; hybrid HLS-RTL design; FPGA |
| Abstract |
This paper presents the design of the post-quantum secure encryption algorithm, Crystals?Kyber, a next-generation public key encryption system based on high-level synthesis (HLS). Furthermore, we propose a hardware/software (HW/SW) co-design approach and a hybrid HLS-RTL design to implement the Crystals?Kyber post-quantum secure encryption system and present the corresponding results. In the HW/SW co-design, we optimized the Crystals?Kyber intellectual property core using HLS for the HW component, while the SW component was implemented on the Xilinx ZYNQ 104 FPGA using Xilinx's PYNQ platform with Python host code. The hybrid design enhanced the overall latency by replacing the polynomial multiplication module in Crystals?Kyber generated by HLS with a hand-coded Verilog HDL-based number theoretic transform module with high data throughput. The results demonstrate a significant latency improve-ment of approximately 40% compared with the Crystals?Kyber designed solely with HLS, and improved area-time product results. |