Mobile QR Code QR CODE

References

1 
C. Y. Lee, J. Kim, H. Park, and S. Choi, ``3D integrated process and hybrid bonding of high-bandwidth memory (HBM),'' Electronic Materials Letters, vol. 21, no. 1, pp. 1-25, Jan. 2025.DOI
2 
K.-I. Moon, H.-Y. Son, and K. Lee, ``Advanced packaging technologies in memory applications for future generative AI era,'' Proc. of the 2023 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, pp. 1-4, Dec. 2023.DOI
3 
K. Kim and M.-J. Park, ``Present and future challenges of high-bandwidth memory (HBM),'' Proc. of the 2024 IEEE International Memory Workshop (IMW), Monterey, CA, USA, pp. 1-4, May 2024.DOI
4 
P. Praful, P. Pallavi, and C. Bailey, ``Warpage in wafer-level packaging: a review of causes, modelling, and mitigation strategies,'' Frontiers in Electronics, vol. 5, 1515860, Jan. 2025.DOI
5 
S. McCann, J. Smith, T. Anderson, and R. Brown, ``Warpage and reliability challenges for stacked silicon interconnect technology in large packages,'' Proc. of the 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), San Diego, CA, USA, pp. 1-8, May 2018.DOI
6 
W. S. Lee, ``Seven years after the A10 processor: the era of heterogeneous integration,'' Proc. of the 2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM) (IITC/MAM), San Jose, CA, USA, pp. 1-4, Jun. 2023.DOI
7 
P. Chen, Y. Liu, H. Wang, and T. Lin, ``Warpage prediction methodology of extremely thin package,'' Proc. of the 2017 IEEE 67th Electronic Components and Technology Conference (ECTC), Orlando, FL, USA, pp. 1-6, May 2017.DOI
8 
S. Kang and I. C. Ume, ``Techniques for measuring warpage of chip packages, PWBs, and PWB assemblies,'' IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 3, no. 9, pp. 1533-1544, Sep. 2013.DOI
9 
L.-Y. Hong and Y.-T. Li, ``Optimize stencil apertures to eliminate SMT solder defects by shadow moiré for warpage measurement,'' Proc. of the 2023 18th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), Taipei, Taiwan, pp. 312-316, Oct. 2023.DOI
10 
W. Tan and I. C. Ume, ``Warpage measurement of board assemblies using projection moiré system with improved automatic image segmentation algorithm,'' Proc. of the 2007 57th Electronic Components and Technology Conference (ECTC), Reno, NV, USA, pp. 1769-1774, May 2007.DOI
11 
F. Qin, S. Zhao, Y. Dai, M. Yang, M. Xiang, and D. Yu, ``Study of warpage evolution and control for six-side molded WLCSP in different packaging processes,'' IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 10, no. 4, pp. 730-738, Apr. 2020.DOI
12 
M.-L. Wu and J.-S. Lan, ``Simulation and experimental study of the warpage of fan-out wafer-level packaging: The effect of the manufacturing process and optimal design,'' IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 9, no. 7, pp. 1396-1405, Jul. 2019.DOI
13 
K.-W. Jang, J.-H. Park, S.-B. Lee, and K.-W. Paik, ``A study on thermal cycling (T/C) reliability of anisotropic conductive film (ACF) flip chip assembly for thin chip-on-board (COB) packages,'' Microelectronics Reliability, vol. 52, no. 6, pp. 1174-1181, Jun. 2012.DOI
14 
C. Cai, S. Kim, T. Jung, and Y. Lee, ``Comparative analysis of package warpage using confocal method and digital image correlation,'' Proc. of the 2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), Orlando, FL, USA, pp. 1-6, Jul. 2020.DOI
15 
G. Sun and S. Zhang, ``A review on warpage measurement metrologies for advanced electronic packaging,'' Microelectronics Reliability, vol. 160, 115456, Apr. 2024.DOI
16 
J. M. Trujillo-Sevilla, T. Mori, K. Watanabe, and H. Yamada, ``New wafer shape measurement technique for 300 mm blank vertically held silicon wafer,'' Proc. of SPIE: Photonic Instrumentation Engineering X, vol. 12428, San Francisco, CA, USA, pp. 1-8, Jan. 2023.DOI
17 
Assignee, Wafer shape and flatness measurement apparatus and method, U.S. Patent 11,105,753 B2, Sep. 7, 2021. https://patents.google.com/patent/US11105753B2/enURL
18 
Assignee, Wafer shape and thickness measurement system utilizing shearing interferometers, U.S. Patent Application US 20,140,293,291 A1, Oct. 2, 2014. https://patents.google.com/patent/US20140293291A1/enURL
19 
W. S. Yoo, T. Ishigaki, and K. Kang, ``Effects of anisotropy and supporting configuration on silicon wafer profile measurements for pattern overlay estimation,'' ECS Solid State Letters, vol. 4, no. 12, p. P91, Dec. 2015.DOI
20 
H. Liu, Y. Zhang, X. Li, and J. Wang, ``Analysis of factors affecting gravity-induced deflection for large and thin wafers in flatness measurement using three-point-support method,'' Metrology and Measurement Systems, vol. 22, no. 4, pp. 531-546, Dec. 2015.DOI
21 
W. Feng, Y. Zhou, T. Nakamura, and K. Sato, ``Study of wafer warpage reduction by dicing street,'' Japanese Journal of Applied Physics, vol. 61, no. SJ, SJ1001, Jan. 2022.DOI
22 
Y. S. Chan, K. H. Ng, M. L. Low, and T. L. Lee, ``Characterization of dicing tape adhesion for ultra-thin die pick-up process,'' Proc. of the 2014 IEEE 16th Electronics Packaging Technology Conference (EPTC), Singapore, pp. 1-6, Dec. 2014.DOI
23 
S.-W. Lee, H.-J. Kim, J.-Y. Park, and K.-S. Han, ``Adhesion performance and UV-curing behaviors of interpenetrated structured pressure sensitive adhesives with 3-MPTS for Si-wafer dicing process,'' Journal of Adhesion Science and Technology, vol. 26, no. 10-11, pp. 1629-1643, Jun. 2012.DOI
24 
Y. Yang, A. Winkler, and A. Karimzadeh, ``A practical approach for determination of thermal stress and temperature-dependent material properties in multilayered thin films,'' ACS Applied Materials & Interfaces, vol. 16, no. 24, pp. 31729-31737, Jun. 2024.DOI
25 
R. Wang, Y. Zhao, L. Chen, and H. Liu, ``Steric and photoreactive control of UV-induced debonding in acrylic pressure-sensitive adhesives for wafer cutting via isocyanate monomer grafting,'' European Polymer Journal, vol. 198, 114128, Feb. 2025.DOI
26 
W.-C. Chuang and W.-L. Chen, ``Study on the strip warpage issues encountered in the flip-chip process,'' Materials, vol. 15, no. 1, 323, Jan. 2022.DOI
27 
J. Jeon, S. Park, Y. Kim, and H. Lee, ``Residual stress and deformation analysis considering adhesive material properties to enhance manufacturing of HBM,'' Journal of Materials Research and Technology, vol. 29, pp. 1-10, Jan. 2025.DOI