KimSeon Woo1
ShinKyung Min1
ParkJong Kyung*
-
(Department of Semiconductor Engineering, Seoul National University of Science & Technology,
Seoul, Korea)
Copyright © The Institute of Electronics and Information Engineers(IEIE)
Index Terms
3D Integration, hybrid bonding, hybrid bonding via (HBV), back end of line (BEOL), circuit modeling
I. INTRODUCTION
According to Moore's Law, as device dimensions shrink, performance has improved; however,
there is an increasing demand for delivering high-frequency signals. Despite advancements
in device solutions, the gap between industrial bandwidth demands and the actual bandwidth
of mass-produced products has continued to widen. To address this issue, 2.5D and
3D integration, including chip stacking, has been proposed [1-3]. New device architectures such as 2.5D and 3D stacking packaging and high-bandwidth
memory (HBM), which enables high-bandwidth signal transmission with a large number
of I/Os, have been developed. These architectures have overcome limitations by adopting
advanced packaging techniques such as Through Silicon Via (TSV) and hybrid bonding
[4,5].
Hybrid bonding is an integration method that simultaneously connects Cu-Cu metal bonds
and dielectric-dielectric materials. This approach minimizes parasitic capacitance
and enables direct circuit connections through fine bonding pitches [6]. Compared to Thermo-Compression Bonding (TCB), which relies on heat and pressure,
hybrid bonding offers higher bonding density and superior electrical and thermal properties.
It also facilitates fine Cu-Cu interconnect pitches below 10 $\mu$m [7,8]. In contrast to solder bump bonding, which involves inserting intermediary materials
for bonding and primarily focuses on the contact and diffusion between bumps and pads,
hybrid bonding is highly sensitive to key process parameters such as misalignment
and dishing, significantly impacting bonding quality [9]. Consequently, these accumulated process variations lead to a significant increase
in contact resistance. Therefore, accurately measuring contact resistance is crucial
for the electrical evaluation and assessment of bonding quality.\\
Previous studies have proposed various daisy chain methods to extract contact resistance
in bonded areas [10,11]. Among them, Jourdon et al. suggested a method that measures the total resistance
of a daisy chain structure and subtracts the theoretically calculated resistance of
the structure (excluding contact resistance) to extract the contact resistance [12]. However, this method, which models theoretical resistance based solely on geometrical
dimensions and material conductivity of a simple chain structure, demonstrated limitations
such as yielding negative contact resistance values.
To address these challenges, this paper proposes a novel DC resistance model for a
4-metal hybrid bonding structure with vias in a daisy chain configuration. By modeling
the current distribution across various vias in the actual bonded structure, we demonstrate
that the resistance values of the proposed equivalent resistance model align with
those obtained from finite element method (FEM) simulations.
Additionally, previous equivalent circuit models for hybrid bonding structures did
not include contact resistance, making it difficult to reflect variations due to bonding
materials and processes [12]. The equivalent circuit designed in this paper allows for arbitrary adjustments of
contact resistance affected by external processes, enhancing accuracy in circuit design.
This feature enables precise extraction of actual resistance within the hybrid bonding
structures without relying on complex FEM simulations. Furthermore, by analyzing the
current distribution through each via, potential issues such as voltage drop from
excessive voltage applied to specific nodes in the bonding structure, as well as power
integrity and metal reliability concerns, can be proactively predicted.
The structure of this paper is as follows: Section II introduces a more accurate DC
circuit model for the Dual Damascene Hybrid Bonding structure, compared to previously
proposed equivalent resistance models. Section III validates the proposed resistance
model by comparing total resistance values under various structural and process parameters
with FEM simulations. Section IV presents the final validation of the proposed model
through the fabrication and evaluation of actual devices.
II. 3-D FEM STRUCTURE
1. Hybrid Bonding Structure
Hybrid bonding integration can be broadly categorized into structures with 2 metal
levels and 4 metal levels (Figs. 1(a)-1(c)). In the 2-metal-level bonding integration, the contact area is formed directly on
the metal line. In contrast, the 4-metal-level hybrid bonding utilizes a 4-metal layer
structure composed of Hybrid Bonding Metal (HBM) and Hybrid Bonding Via (HBV) at the
Back End of Line (BEOL), directly connecting with other BEOL layers (Fig. 1(d)) [13]. This HBV structure enables the alignment of HBVs to desired positions while simplifying
the process by connecting metal lines and HBVs in a single BEOL step. Moreover, by
adopting the dual damascene process, it reduces misalignment issues and demonstrates
robustness in fine-pitch hybrid integration [14-16]. Additionally, adjusting the structure and density of HBVs allows control over the
current flowing through each metal, preventing void formation due to excessive current
and enabling resistance tuning [17]. This paper proposes an effective equivalent resistance model for the structure in
Fig. 1(c) to leverage these advantages of the HBV structure.
Fig. 2(a) presents a simple circuit model using dimensions and metal resistivity [12]. The dual damascene hybrid bonding structure is divided into three main parts in
the equivalent circuit schematic: top metal, bottom metal, and HBV/HBM. Based on Eqs.
(1) and (2) in Appendix, where the HBV is modeled as four vias connected in parallel, calculations
using the actual structure's dimensions yield a total resistance of 170 m$\Omega$
for the analytical model in Fig. 2(a). However, FEM simulation of the same structure results in total resistance of 149
m$\Omega$, revealing a 12% error (see Appendix).
Notably, this calculation does not account for contact resistance, as no model for
adding contact resistance was proposed. To analyze the causes of this significant
error, a 4-metal bonding structure was created using Ansys Maxwell simulator [18,19]. The via size, metal thickness, and pitch used in this study were selected to reflect
current trends in semiconductor packaging and practical process constraints. (See
Table 1 in Appendix). By applying specific voltages to the top and bottom metals of the actual
structure, current distribution and resistance components were examined. Fig. 2(b) shows the current density measured through Ansys FEM simulation for the 3D bonding
structure. Using 11 vias, the simulation revealed noticeable deviations in current
density across the vias. Specifically, the rightmost via on the top side of the hybrid
bonding metal (HBM) exhibited the highest current density. Modeling all vias in parallel
in the equivalent circuit leads to uniform current distribution, differing from FEM
simulation results and causing errors. Thus, the parallel configuration of all vias
in the existing equivalent circuit model introduces discrepancies, necessitating a
refined circuit model calibrated with FEM simulation results.
Fig. 1. {Schematic diagrams of (a) 2-metal and (b-c) 4-metal hybrid bonding structures
highlighting metal line contact regions and BEOL-level Hybrid Bonding Metal (HBM)
and Hybrid Bonding Via (HBV) connections. (d) Illustration of the 4-metal hybrid bonding
structure integrating HBM and HBV with other BEOL layers.}
Fig. 2. {(a) Equivalent circuit model using simplified dimensions and metal resistivity
for the dual damascene hybrid bonding structure. (b) Current density distribution
in the 3D hybrid bonding structure analyzed using Ansys FEM simulation, showing current
variation across multiple vias.}
2. Proposed Circuit Model
Fig. 3(b) presents an improved model addressing the shortcomings of the analytical model in
Fig. 3(a). The top metal's resistance is divided into multiple resistive components (R${}_{top.sub}$),
allowing the equivalent model to represent varying potential within a single metal
layer. This modification accurately reflects the FEM simulation result in Fig. 2(b), where current density is lowest in the leftmost via and highest in the via closest
to the current source. Fig. 3(c) further divides the resistance components of the HBM bonding pad by width and length,
classifying resistances based on current flow direction into core and substrate directions.
Fig. 3(d) introduces a contact resistance component between HBMs.
According to previous studies, the contact resistivity at the Cu/Cu interface during
bonding is approximately $10^{-8}$ to $10^{-9}$ $\Omega\cdot$cm$^2$ [12,20,21]. Assuming a void-free bonding interface, substituting this value into R${}_{\rm contact}$
should align the model's total resistance with electrical measurements of perfectly
bonded structures. This adjustment effectively incorporates contact resistance into
the model.
The proposed equivalent resistance model initially assumes vias distributed along
the metal width in the X-axis direction, as shown in Fig. 4(a). However, it must also accommodate cases where the number of vias is smaller than
the metal width due to process constraints, as in Fig. 4(b). To model resistance characteristics according to via count, FEM simulations and
circuit model comparisons were conducted for HBV arrays ranging from $1\times 4$ to
$5\times 4$ vias (Fig. 4(c)). Results show perfect agreement between the circuit model and FEM simulation for
the $5\times4$ via configuration. However, in the $1\times 4$ array, FEM simulation
yielded 149.913 m$\Omega$, while the proposed circuit model calculated 131.265 m$\Omega$,
resulting in a 13% error.
This discrepancy stems from biased current density in the top metal due to the via
distribution along the X-axis.
Fig. 4(b) indicates that the current density is highest near the center vias and decreases
toward the outer metal edges. This suggests that directly using the top metal's cross-sectional
area in the resistance formula is inappropriate for precise modeling. For accurate
resistance calculation, a corrected cross-sectional area S', which adjusts the original
area S by accounting for via distribution, should be used. To calculate this correction
factor, FEM simulations were conducted on $1\times4$ via arrays while varying the
top metal width from 5400 $\mu$m to 1200 $\mu$m (Fig. 4(d)). This process identified the correction factor that aligns the resistance values
of the FEM simulation and the proposed model. Results indicate that the correction
factor increases proportionally with the top metal width, improving the accuracy of
the equivalent resistance model when factoring in the via count relative to the metal
width.
Fig. 3. {(a) Previous analytical model of the hybrid bonding structure lacking accurate
current distribution representation. (b) Improved equivalent circuit model with segmented
top metal resistance (R${}_{\rm top.sub}$) to reflect potential differences within
a metal layer. (c) Refined model separating HBM resistance components by width and
length, classified into core and substrate directions. (d) Proposed enhanced model
incorporating contact resistance at the Cu/Cu interface to improve alignment with
experimental measurements.}
Fig. 4. {(a) Ideal via distribution along the X-axis, matching the metal width for
accurate resistance modeling. (b) Non-uniform via distribution scenario, highlighting
current density concentration at the metal center and reduction at the edges. (c)
Comparison of FEM simulation and circuit model results for varying via configurations
from $1\times4$ to $5\times4$ arrays. (d) FEM simulation-based correction factor determination
for varying top metal widths in the $1\times4$ via configuration.}
III. MODEL VERIFICATION
1. ANSYS Simulation
The developed equivalent circuit model was thoroughly verified against FEM simulations
under various structural and process parameters. Figs. 5(a)-5(c) compares the results of FEM simulations and circuit modeling for key parameters of
vias in the hybrid bonding structure, including via count, height, and resistivity.
In Fig. 5(a), the via count was increased from 15 ($5\times3$ array) to 25 ($5\times5$ array),
and the total resistance values from both FEM simulations and the circuit model showed
consistent agreement. Fig. 5(b) illustrates the comparison of resistance changes as via height varied from 550 nm
to 1750 nm. Both models exhibited identical trends of increasing resistance with increasing
via height, with minimal discrepancies in total resistance. Fig. 5(c) presents the comparison of resistance values as via resistivity changed. Both the
FEM simulation and circuit model consistently followed the trend of increasing resistance
with higher resistivity, confirming the high reliability of the proposed resistance
model.
Additionally, Fig. 5(d) compares resistance values between FEM simulation and the circuit model by varying
contact resistivity in the hybrid bonding structure. Contact resistivity is a critical
parameter influenced by material and process conditions. In the FEM simulation, a
1 nm-thick resistive film was inserted at the bonding interface to emulate contact
resistance. The resistance of this ultra-thin layer was controlled by adjusting its
conductivity, and the contact resistivity and resistance were applied based on Eqs.
(3) and (4). The results demonstrated excellent agreement between the two models, with discrepancies
remaining below 1%. These findings validate that the proposed circuit model robustly
and accurately predicts total resistance under variations in via height, via count,
resistivity, and contact resistivity. This reliability suggests that the circuit model
can efficiently optimize various parameters in hybrid bonding structure.
Fig. 5. {Comparison of total resistance between FEM simulation and circuit model (a)
as the via count increases from a $5\times3$ to a $5\times5$ array, (b) with varying
via heights from 550 nm to 1750 nm, (c) with varying via resistivity values, (d) by
varying contact resistivity in the hybrid bonding structure.}
2. Fabrication and Electrical Measurement
To further verify the equivalent circuit model, experimental validation was conducted
using fabricated devices. For experimental simplicity, a Dual Damascene Hybrid bonding
structure was designed with horizontal alignment on the wafer, enabling adjustments
in via count, via height, and top metal width for resistance comparison.
Fig. 6(a) shows an optical microscope image of the patterned structure after the lift-off process
and just before measurements. The metal width was adjusted via the thickness of the
deposited metal layers. In this experiment, a 50 nm Ti layer and a 200 nm Cu layer
were deposited. To reduce contact resistance during probing, a 10 nm Ru layer was
deposited subsequently to prevent Cu oxidation during later processes [3,22]. In the FEM simulation, a current of 100 mA was applied, and the voltage drop between
the I${}_{\rm in}$ and I${}_{\rm out}$ (sink) terminals was measured.
The resistance was then calculated using Ohm's law. Similarly, in the actual electrical
measurement, a constant DC current of 100 mA was applied using a two-point probe method,
with one side set to ground. The voltage drop was measured across the probes, and
the resistance was calculated based on Ohm's law, using a Semiconductor Parameter
Analyzer (Keithley 4200A-SCS). However, the two-point probe method is affected by
various parasitic resistances, including contact resistance, which can influence the
measurement results. The parasitic resistance was measured to be approximately 0.2
$\Omega$, and this value was subtracted from the total measured resistance to obtain
the corrected result.
As shown in Fig. 6(b), the experiment involved 16 structural configurations (Config.A, Config.B, Config.C)
designed to analyze how via height, via count, and top metal thickness (d) impact
the resistance of the dual damascene hybrid bonding structure. In Config.A, via height
was varied incrementally from 69 $\mu$m to 552 $\mu$m across eight patterns to assess
resistance trends. Fig. 7(a) confirms that measured values and circuit model results followed consistent trends
with via height changes. Config.B involved increasing the via count from 2 to 5, with
measurements again aligning with circuit model trends. Config.C further examined the
impact of increasing the top metal thickness from 90 $\mu$m to 180 $\mu$m, producing
results consistent with circuit model predictions. These experimental validations
confirm the accuracy and robustness of the proposed equivalent circuit model across
multiple parameter variations.
Fig. 6. {(a) Optical microscope image of the patterned structure after the lift-off
process and prior to measurement. (b) Schematic of 16 structural configurations (Config.A,
Config.B, Config.C) designed to evaluate the effects of via height, via count, and
top metal thickness on resistance.}
Fig. 7. {Comparison of experimental measurements and circuit model results for resistance
variation (a) with different via heights in Config.A, (b) with different via counts
in Config.B and (c) top metal thickness in Config.C, demonstrating consistent trends.}
IV. CONCLUSIONS
This study presented a novel equivalent circuit model for a 4-metal hybrid bonding
structure, specifically designed for dual damascene hybrid bonding configurations.
The model successfully incorporates key structural parameters such as via count, via
height, resistivity, and contact resistivity, accurately predicting total resistance
in hybrid bonding systems. Verification through FEM simulations demonstrated that
the proposed model maintains high precision, with discrepancies consistently below
1%. Experimental validation using fabricated devices with varying structural configurations
further confirmed the model's reliability and robustness.
The results indicate that the proposed model effectively addresses limitations in
traditional analytical models by accurately modeling current distribution and integrating
contact resistance effects. This advancement enables precise resistance prediction
and optimization in the design of hybrid bonding structures, reducing reliance on
complex FEM simulations. Consequently, this model offers significant potential for
enhancing the design and performance of next-generation semiconductor packaging technologies.
APPENDIX
Table 1. Parameters Uused in the equivalent circuit model and FEM simulation.
ACKNOWLEDGMENTS
This study was financially supported by Seoul National University of Science &
Technology.
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Seon Woo Kim received a B.S. degree in electronic engineering from the Seoul National
University of Science and Technology, Seoul, South Korea, in 2025. He conducted research
as an undergraduate researcher under the supervision of Prof. J. K. Park. His research
interests included signal integrity of interposers in high-speed signals and testing
methods for measuring interface quality in Cu-Cu hybrid bonding.
Kyung Min Shin received his B.S. degree in electrical engineering from the Seoul
National University of Science and Technology, Seoul, South Korea, in 2024. He is
currently pursuing an M.S. degree in semiconductor engineering, under the supervision
of Prof. J. K. Park. His current research interests include 3-D heterogenous integration
and Cu-Cu bonding.
Jong Kyung Park received his B.S. degree in electrical engineering from Yonsei
University, Seoul, Korea, in 2008. He obtained his M.S. and Ph.D. degrees in electrical
engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon,
Korea, in 2010 and 2014, respectively. Previously, he worked as a Senior Engineer
at SK Hynix in South Korea. Currently, he holds the position of Assistant Professor
at the Department of Semiconductor Engineering, Seoul National University of Science
and Technology, Seoul, South Korea.