I. INTRODUCTION

Terahertz (THz) technology utilizes the frequency range from 0.1 THz to 10 THz in the electromagnetic spectrum, corresponding to wavelengths between 30 $\mu$m and 3 mm, and energies ranging from 0.42 meV to 42 meV. This frequency range exhibits unique physical characteristics, such as the coexistence of both the propagation ability of radio frequency (RF) waves and the directivity of optical waves, which enable diverse applications in communication, imaging, and spectroscopy. Among these, electronic device-based imaging technologies have been extensively demonstrated to show significant commercial potential in the near-future ^[1,2]. CMOS-based THz imaging sensors are capable of detecting THz frequencies through the plasma-mode operation mechanism, where free electrons collectively oscillate, in contrast to the transit-mode mechanism, which has limitations due to its cut-off frequency ^[3-5].

In plasma-mode, although high responsivity can be achieved with resonant mode operation ^[6], the non-resonant mode is suitable for various imaging sensor applications because of its advantages, such as the ability to operate at room temperature, stability with respect to high-power sources, and a wide bandwidth ^[7]. In particular, non-resonant silicon (Si) field-effect transistor (FET) based plasmonic THz sensors enable the development of real-time and large-area THz imaging systems through multi-pixel integration ^[8].

Since the mid-2000s, Si-based plasmonic THz detectors have been reported to achieve performance comparable to compound-based THz detectors, such as high-electron-mobility transistors (HEMT) ^[9]. However, although the size of conventional semiconductors has been scaled to the sub-micrometer range, integrating sub-millimeter antennas to absorb relatively long THz wavelengths (0.3 ${\sim}$ 3 mm) induces power loss due to impedance mismatching ^[10]. To overcome these design limitations, the concept of a monolithic transistor-antenna (Trantenna), where the device itself operates as an antenna, has been proposed as an impedance matching solution ^[11,12]. Additionally, it has been demonstrated that detection performance can be further enhanced through structural asymmetry, which overcomes the saturation limits caused by asymmetric boundary conditions at the source and drain in non-resonant mode ^[13,14].

In this paper, we demonstrate a significant performance enhancement of the Trantenna with structural asymmetry through shallow trench isolation (STI) fabrication technology in 28-nm CMOS foundry technology. In Section II, we investigate the operational principle of the Si FET-based plasmonic THz detector and show the limitations in performance enhancement due to boundary conditions. In Section III, we experimentally demonstrate the performance enhancement through the channel confinement effect achieved by using shallow trench isolation (STI) technology to localize the channel.

II. OPERATION PRINCIPLE OF THZ DETECTOR AND PERFORMANCE ENHANCEMENT

The Si FET-based THz detector operates in a non-resonant mode due to its comparatively low mobility characteristics and can detect THz wave signal by detecting the difference in dc voltage between the source and drain in the weak inversion region.

Fig. 1(a) shows the plasmonic THz detector based on Si FET that operate in a non-resonant mode. Under the channel turns on a weak inversion state due to dc gate voltage ($V_{\rm G}$) less than threshold voltage (${V}_{\rm TH}$), 2-DEG oscillation occurs together with propagation distance (${l}_{\rm 2DEG}$) while the THz wave incident on to detector. At this time, asymmetric charge distribution occurs in the channel due to the asymmetric boundary condition between the gate-source and gate-drain, and dc output voltage ($\Delta{u}$) can be obtained between the source and drain.

Fig. 1. (a) MOSFET based THz wave detector with 2-DEG propagation distance ($l_{\rm 2DEG}$). (b) The device simulation results as structural symmetry and asymmetry boundary conditions (B.C).

Fig. 1(b) shows the simulation results by the symmetry and asymmetry boundary conditions between the source-gate and the source-drain. Under symmetric boundary conditions with $C_{\rm gs}= C_{\rm gd}$, the same 2-DEG oscillation occurs on the source and drain sides, resulting in ${l}_{\rm 2DEG}$ of the same length. Therefore, $\Delta{u}$ is not detected because there is no voltage difference between both ends under symmetric boundary conditions. On the other hand, in the case of asymmetric boundary conditions with $C_{\rm gs} > C_{\rm gd}$, the gate to source becomes an ac pass condition, resulting in 2-DEG modulation only on the drain side, which is an ac open condition, and output dc voltage ($\Delta{u}$) according to the difference in electron density is detected.

Fig. 2. TCAD simulation results of normalized $\Delta u$ as a asymmetry ratio ($\eta_{\rm a}$).

Fig. 2 presents the TCAD simulation results of normalized peak $\Delta{u}$ as a function of gate-to-source (${C}_{\rm gs}$) and gate-to-drain (${C}_{\rm gd}$) capacitances with respect to source and drain widths (${W}_{\rm S}$, ${W}_{\rm D}$). The results indicate that, in MOSFET design, device performance can be improved by adopting an asymmetric layout that effectively controls the overlap regions between the gate and the source/drain areas. However, when the asymmetry factor ($\eta_{\rm a}$) exceeds 100, the enhancement becomes saturated due to the inherent limitation of asymmetric boundary conditions. This suggests that additional design strategies are required to overcome the performance limitation imposed by such boundary conditions.

1. Novel Design for High Performance by Channel Confinement Effect with STI

Fig. 3 shows the top view schematic and microscope image of the monolithic trantenna plasmonic THz detector fabricated by using 28-nm CMOS foundry technology. As shown in Fig. 3, the asymmetric channel of the trantenna has newly designed by surrounded a shallow trench isolation (STI). The simulated trantenna has a ${L}_{\rm G}= 200$ nm, fixed ${W}_{\rm S}= 3$ $\mu$m, variable ${W}_{\rm D}$, and the STI depth of 0.3 $\mu$m set with reference to a published work employing the standard 28-nm CMOS process ^[15].

Fig. 3. Top view schematic of monolithic trantenna ^[11,12] with confined channel structure and microscope image of trantenna fabricated by 28-nm CMOS foundry.

Figs. 4(a) and 4(b) show the TCAD simulation results of plasmonic THz detector has non-confined or confined channel structure, respectively. As shown in the Fig. 4, the same ${l}_{\rm 2DEG}$ occurs by incident THz wave into the detector. However, the 2-DEG density of the confined channel structured THz detector shown to be enhanced compared to the non-confined channel structured detector. These results from the enhanced electron density due to a highly localized channel structure by confinement effect with STI. The THz wave is rectified to dc offset voltage $\Delta{u}$. According to Ohm's law, $\Delta{u}$ can be expressed as

$ \Delta u = j_{\rm 2-DEG,net} \times R_{\rm ch}, $

where ${j}_{\rm 2-DEG,net}$ is the net current density by charge oscillation and ${R}_{\rm ch}$ is the trantenna channel resistance.

Fig. 4. Channel electron density contour plots under incident THz wave onto MOSFET with (a) non-confined channel structure, (b) confined channel structure with STI.

The generated net current (${j}_{\rm 2-DEG,net}$) by charge asymmetry can be expressed as ^[13]

$ j_{\rm 2-DEF,net} = j_{\rm 2-DEG,D}-j_{\rm 2-DEG, S},\\ j_{\rm 2-DEG,D~and~S}=qD_{\rm n} \frac{N_{\rm 2-DEG,D~and~S}}{l_{\rm 2DEG}}, $

where ${q}$ is the electronic charge, ${D}_{\rm n}$ is the electron diffusivity (cm${}^{2}$/s) and ${l}_{\rm 2DEG}$ is the 2-DEG propagation length (cm). ${N}_{\rm 2-DEG,D}$ and ${N}_{\rm 2-DEG,S}$ are the 2-DEG concentration (cm${}^{-3}$) at drain and source respectively.

Fig. 5. Electron density oscillations as a channel position and time from TCAD simulation in the devices of Figs. 4(a) and 4(b). and normalized $N_{\rm 2-DEG}$ at minimum ($x= 0.025$ $\mu$m) and maximum ($x= 0.175$ $\mu$m) positions under the equal $R_{\rm ch}$ condition (inset).

Fig. 5(a) shows the channel electron density oscillations between the source and drain at 0.1 THz as the function of positions and time. The charge asymmetry has been obtained through the transient simulation and the normalized minimum (at ${x}= 0.025$ $\mu$m) and maximum (at ${x}= 0.175$ $\mu$m) ${N}_{\rm 2-DEG}$ has been extracted under the equalized channel resistance (${R}_{\rm ch}$) in each device (inset). As shown in Fig. 5, the ${N}_{\rm 2-DEG}$ is more oscillated at the confined channel structure with STI than non-confined channel structure by highly localized channel due to the enhanced boundary condition by confinement effect.

III. RESULTS AND DISCUSSION

Fig. 6(a) shows the setup for GSG on-chip probe measurement. After applying ${V}_{\rm G}= {V}_{\rm TH}= 0.3$ V using a source meter (Keithley 2612B) to form a weak inversion layer, 0.1 THz ac-voltage was applied to the gate with a vector network analyzer (Keysight N5247A VNA) to measure the DC output voltage $\Delta{u}$ using a lock-in amplifier (SRS SR830).

Fig. 6. (a) GSG on-chip measurement setup with vector network analyzer (VNA) with extender ($0.09\sim0.5$ THz) and probe station, (b) measured $\Delta u$ results by function of gate voltage ($V_{\rm G}$) with enhanced asymmetry ratio and current enhancement by channel confinement (inset).

Fig. 6(b) shows the measurement results of enhanced peak voltage of the photoresponse $\Delta{u}$ (mV) according to the function of ${W}_{\rm D}$. The drain width (${W}_{\rm D}$) was fabricated as 600, 400, 200, and 80 nm splits with fixed source width (${W}_{\rm S}= 3$ $\mu$m), and the GSG on-chip measurement was performed. As shown in Fig. 6(b), as the channel at the drain side where 2-DEG oscillation occurs is more localized by STI, the enhanced output $\Delta{u}$ has been obtained by the intensified boundary conditions. These results clearly show that the enhancement of the $\Delta{u}$ of the THz detector with confined channel is due to the enhanced electron density (inset).

Fig. 7(a) shows the free-space measurement setup for $\Delta {u}$ at 0.1-THz radiation using a packaged trantenna fabricated in a 28-nm CMOS foundry technology. The setup consists of a lock-in amplifier for measuring $\Delta {u}$ and an SMU for applying the gate voltage (${V}_{\rm G}$). The trantenna is directly illuminated by a 0.1-THz wave generator equipped with a horn antenna.

Fig. 7. (a) Free space $\Delta u$ measurement setup for the trantenna at 0.1 THz system. (b) Normalized $\Delta u$ as a function of gate voltage for the different confined and non-confined channel structures. Symbols and error bars show the average and standard deviation from 4 packaged samples of each detector group, respectively (inset).

Fig. 7(b) shows the measured normalized $\Delta {u}$ of the trantenna under 0.1-THz radiation as a function of gate voltage. The plotted data represent the averaged values from four packaged die test chips, and the standard deviation of the $\Delta {u}_{\rm peak}$ is presented in the inset. The peak $\Delta{u}$ appears near the threshold voltage (${V}_{\rm TH}$), where a weak inversion layer is formed. Experimentally, we demonstrated a 2.25-fold performance enhancement in the trantenna with a confined-channel structure compared to the non-confined-channel structure, which can be attributed to the intensified boundary conditions imposed by the STI-surrounded channel. These findings suggest that further improvement may be achievable through structural optimization of the plasmonic trantenna THz detector.

IV. CONCLUSIONS

We experimentally demonstrate a significantly enhanced performance in THz detection based on a monolithic trantenna fabricated using 28-nm CMOS technology. The effects of asymmetric boundary conditions at the channel in non-resonant plasmonic THz detection have been investigated. Furthermore, we show that the performance of the confined channel trantenna within the highly localized channel, fabricated using STI technology, is more enhanced than conventional monolithic trantenna devices. These results can provide the possibility for further performance improvements through structural optimization for real-time, large-area THz imaging systems, and offer promising prospects for advancing CMOS-based plasmonic THz sensors for both scientific research and practical applications in near-future THz imaging technologies.