| Title |
MOCASLL: Maximum Output Corruption Anti-SAT Logic Locking |
| Authors |
(Weizheng Wang) ; (Xiang Zhu) ; (Tieqiao Liu) |
| DOI |
https://doi.org/10.5573/JSTS.2026.26.3.212 |
| Keywords |
Integrated circuit; hardware security; logic locking; SAT attack; output corruptibility |
| Abstract |
Logic locking technology effectively combats piracy and reverse engineering threats in integrated circuits. The advent of the SAT attack fundamentally altered the landscape of traditional logic locking techniques.
Subsequently developed countermeasures primarily focused on resisting SAT attacks. However, most logic locking schemes face a critical trade-off between SAT attack resilience and output corruptibility. Techniques exhibiting high SAT resistance typically fail to achieve significant corruption at the circuit outputs and often require combination with other schemes. Unfortunately, such composite approaches are vulnerable to attacks like AppSAT. While some locking techniques have managed to increase output corruptibility, the achieved levels remain relatively low.
This paper proposes Maximum Output Corruption Anti-SAT Logic Locking (MOCASLL). Unlike other designs aimed at increasing corruption, MOCASLL guarantees near-maximal resistance to SAT attacks (requiring 2n ? 1 iterations) while simultaneously ensuring the highest possible output corruptibility, approaching 50%. Furthermore, MOCASLL demonstrates resilience against removal attacks and maintains low hardware overhead. |