| Title |
Gate Edge Sidewall Integration for Breakdown Voltage Enhancement in GaN HEMTs |
| Authors |
(Sang Woo Park) ; (Jongmin Lee) ; (Jang Hyun Kim) |
| DOI |
https://doi.org/10.5573/JSTS.2026.26.1.8 |
| Keywords |
GaN HEMT; sidewall; breakdown voltage; reliability; TCAD simulation |
| Abstract |
This study proposes a silicon nitride (Si3N4) sidewall structure for Gallium Nitride (GaN) high electron mobility transistors (HEMTs). The proposed structure effectively mitigates electric field (e-field) crowding at the gate-to-drain edge, a critical issue that leads to increased gate leakage and limited breakdown voltage (BV). Conventional GaN HEMTs suffer from severe e-field concentration, which requires effective mitigation strategies beyond conventional field plate (FP) that introduce undesirable parasitic capacitances. Our proposed sidewall structure effectively reshapes the gate edge profile, leading to a distribution of the e-field and improved device performance without requiring additional FP. The sidewall structure demonstrated a 34.76% reduction in peak e-field (from 20.13 MV/cm to 13.13 MV/cm) at the gate-drain edge compared to the conventional structure through TCAD simulations.
This effective field mitigation resulted in a notable 8.8% enhancement in BV, increasing from 373 V to 406 V, and effectively suppressed gate leakage current near the BV. These results demonstrate that gate-edge sidewall engineering effectively alleviates e-field crowding, leading to improved breakdown performance and enhanced reliability in GaN HEMTs. |